he ZL40213 is an LVDS clock fanout buffer with two identical output clock drivers capable of operating at frequencies up to 750MHz.
The ZL40213 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40213 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.
The ZL40213 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.
Additional Features
Ultra low additive jitter of 78 fs RMS
Accepts differential or single-ended input: LVPECL, LVDS, CML, HCSL, LVCMOS
On-chip input termination resistors and biasing for AC coupled inputs
Two precision LVDS outputs. Operating frequency up to 750 MHz
Options for 2.5 V or 3.3 V power supply with current consumption of 44 mA
On-chip Low Drop Out (LDO) Regulator for superior power supply rejection
he ZL40213 is an LVDS clock fanout buffer with two identical output clock drivers capable of operating at frequencies up to 750MHz.
The ZL40213 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40213 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.
The ZL40213 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.
Additional Features
- Ultra low additive jitter of 78 fs RMS
- Accepts differential or single-ended input: LVPECL, LVDS, CML, HCSL, LVCMOS
- On-chip input termination resistors and biasing for AC coupled inputs
- Two precision LVDS outputs. Operating frequency up to 750 MHz
- Options for 2.5 V or 3.3 V power supply with current consumption of 44 mA
- On-chip Low Drop Out (LDO) Regulator for superior power supply rejection
