Microchip Technology, Inc. 6-Output Clock Generator int. EEPROM ZL30265

Description
CREATE AND SAMPLE YOUR CUSTOM ZL30265 HERE The miClockSynth ZL30265 high-performance, any-rate multiplier and clock generator simplifies board design by generating ultra-low-jitter clock signals from a single crystal or crystal oscillator while generating additional independent frequency families. With up to four independent frequency families on one chip, best-in-class jitter performance, and two fractional-N APLLs with both a fractional and integer divider, the ZL30265 creates a complete clock-tree, improving design reliability, reducing bill of materials (BOM) cost, and simplifying design by replacing multiple crystals and peripheral timing components. Additional Features The two APLLs have fractional dividers and integer dividers to make four independent frequency families Four Flexible Input Clocks: One crystal/CMOS input, Two differential/CMOS inputs, One single-ended/CMOS input Any input frequency from 9.72MHz to 1.25GHz (300MHz max for CMOS) Activity monitors, automatic or manual switching Glitch-less clock switching by pin or register 6 Any-Frequency, Any-Format Outputs Any output frequency from 1Hz to 1045MHz High-resolution frac-N APLL with 0ppm error Output jitter from integer multiply and dividers as low as 0.17ps RMS (12kHz-20MHz) Output jitter from fractional dividers is typically < 1ps RMS, many frequencies <0.5ps RMS Each output has an independent divider and is configurable as LVDS, LVPECL, HCSL, 2xCMOS or HSTL In 2xCMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz) Multiple output supply voltage banks with CMOS output voltages from 1.5V to 3.3V Precise output alignment circuitry and per-output phase adjustment Per-output enable/disable and glitch-less start/stop (stop high or low) Automatic self-configuration at power-up from internal EEPROM (see ZL30264 for internal EEPROM); up to 8 configurations pin-selectable External feedback for zero-delay applications Numerically controlled oscillator mode Spread-spectrum modulation mode Generates PCIe 1, 2, 3, 4, 5 compliant clocks Easy-to-configure design requires no external VCXO or loop filter components SPI or I2C processor Interface Core supply voltage options: 2.5V only, 3.3V only, 1.8V+2.5V or 1.8V+3.3V Space-saving 8x8mm QFN56 (0.5mm pitch)
Datasheet
Description
CREATE AND SAMPLE YOUR CUSTOM ZL30265 HERE The miClockSynth ZL30265 high-performance, any-rate multiplier and clock generator simplifies board design by generating ultra-low-jitter clock signals from a single crystal or crystal oscillator while generating additional independent frequency families. With up to four independent frequency families on one chip, best-in-class jitter performance, and two fractional-N APLLs with both a fractional and integer divider, the ZL30265 creates a complete clock-tree, improving design reliability, reducing bill of materials (BOM) cost, and simplifying design by replacing multiple crystals and peripheral timing components. Additional Features The two APLLs have fractional dividers and integer dividers to make four independent frequency families Four Flexible Input Clocks: One crystal/CMOS input, Two differential/CMOS inputs, One single-ended/CMOS input Any input frequency from 9.72MHz to 1.25GHz (300MHz max for CMOS) Activity monitors, automatic or manual switching Glitch-less clock switching by pin or register 6 Any-Frequency, Any-Format Outputs Any output frequency from 1Hz to 1045MHz High-resolution frac-N APLL with 0ppm error Output jitter from integer multiply and dividers as low as 0.17ps RMS (12kHz-20MHz) Output jitter from fractional dividers is typically < 1ps RMS, many frequencies <0.5ps RMS Each output has an independent divider and is configurable as LVDS, LVPECL, HCSL, 2xCMOS or HSTL In 2xCMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz) Multiple output supply voltage banks with CMOS output voltages from 1.5V to 3.3V Precise output alignment circuitry and per-output phase adjustment Per-output enable/disable and glitch-less start/stop (stop high or low) Automatic self-configuration at power-up from internal EEPROM (see ZL30264 for internal EEPROM); up to 8 configurations pin-selectable External feedback for zero-delay applications Numerically controlled oscillator mode Spread-spectrum modulation mode Generates PCIe 1, 2, 3, 4, 5 compliant clocks Easy-to-configure design requires no external VCXO or loop filter components SPI or I2C processor Interface Core supply voltage options: 2.5V only, 3.3V only, 1.8V+2.5V or 1.8V+3.3V Space-saving 8x8mm QFN56 (0.5mm pitch)
Datasheet

Suppliers

Company
Product
Description
Supplier Links
6-Output Clock Generator int. EEPROM - ZL30265 - Microchip Technology, Inc.
Chandler, AZ, United States
6-Output Clock Generator int. EEPROM
ZL30265
6-Output Clock Generator int. EEPROM ZL30265
CREATE AND SAMPLE YOUR CUSTOM ZL30265 HERE The miClockSynth ZL30265 high-performance, any-rate multiplier and clock generator simplifies board design by generating ultra-low-jitter clock signals from a single crystal or crystal oscillator while generating additional independent frequency families. With up to four independent frequency families on one chip, best-in-class jitter performance, and two fractional-N APLLs with both a fractional and integer divider, the ZL30265 creates a complete clock-tree, improving design reliability, reducing bill of materials (BOM) cost, and simplifying design by replacing multiple crystals and peripheral timing components. Additional Features The two APLLs have fractional dividers and integer dividers to make four independent frequency families Four Flexible Input Clocks: One crystal/CMOS input, Two differential/CMOS inputs, One single-ended/CMOS input Any input frequency from 9.72MHz to 1.25GHz (300MHz max for CMOS) Activity monitors, automatic or manual switching Glitch-less clock switching by pin or register 6 Any-Frequency, Any-Format Outputs Any output frequency from 1Hz to 1045MHz High-resolution frac-N APLL with 0ppm error Output jitter from integer multiply and dividers as low as 0.17ps RMS (12kHz-20MHz) Output jitter from fractional dividers is typically < 1ps RMS, many frequencies <0.5ps RMS Each output has an independent divider and is configurable as LVDS, LVPECL, HCSL, 2xCMOS or HSTL In 2xCMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz) Multiple output supply voltage banks with CMOS output voltages from 1.5V to 3.3V Precise output alignment circuitry and per-output phase adjustment Per-output enable/disable and glitch-less start/stop (stop high or low) Automatic self-configuration at power-up from internal EEPROM (see ZL30264 for internal EEPROM); up to 8 configurations pin-selectable External feedback for zero-delay applications Numerically controlled oscillator mode Spread-spectrum modulation mode Generates PCIe 1, 2, 3, 4, 5 compliant clocks Easy-to-configure design requires no external VCXO or loop filter components SPI or I2C processor Interface Core supply voltage options: 2.5V only, 3.3V only, 1.8V+2.5V or 1.8V+3.3V Space-saving 8x8mm QFN56 (0.5mm pitch)

CREATE AND SAMPLE YOUR CUSTOM ZL30265 HERE

The miClockSynth ZL30265 high-performance, any-rate multiplier and clock generator simplifies board design by generating ultra-low-jitter clock signals from a single crystal or crystal oscillator while generating additional independent frequency families.
With up to four independent frequency families on one chip, best-in-class jitter performance, and two fractional-N APLLs with both a fractional and integer divider, the ZL30265 creates a complete clock-tree, improving design reliability, reducing bill of materials (BOM) cost, and simplifying design by replacing multiple crystals and peripheral timing components.

Additional Features

  • The two APLLs have fractional dividers and integer dividers to make four independent frequency families
  • Four Flexible Input Clocks: One crystal/CMOS input, Two differential/CMOS inputs, One single-ended/CMOS input
  • Any input frequency from 9.72MHz to 1.25GHz (300MHz max for CMOS)
  • Activity monitors, automatic or manual switching
  • Glitch-less clock switching by pin or register
  • 6 Any-Frequency, Any-Format Outputs
  • Any output frequency from 1Hz to 1045MHz
  • High-resolution frac-N APLL with 0ppm error
  • Output jitter from integer multiply and dividers as low as 0.17ps RMS (12kHz-20MHz)
  • Output jitter from fractional dividers is typically < 1ps RMS, many frequencies <0.5ps RMS
  • Each output has an independent divider and is configurable as LVDS, LVPECL, HCSL, 2xCMOS or HSTL
  • In 2xCMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz)
  • Multiple output supply voltage banks with CMOS output voltages from 1.5V to 3.3V
  • Precise output alignment circuitry and per-output phase adjustment
  • Per-output enable/disable and glitch-less start/stop (stop high or low)
  • Automatic self-configuration at power-up from internal EEPROM (see ZL30264 for internal EEPROM); up to 8 configurations pin-selectable
  • External feedback for zero-delay applications
  • Numerically controlled oscillator mode
  • Spread-spectrum modulation mode
  • Generates PCIe 1, 2, 3, 4, 5 compliant clocks
  • Easy-to-configure design requires no external VCXO or loop filter components
  • SPI or I2C processor Interface
  • Core supply voltage options: 2.5V only, 3.3V only, 1.8V+2.5V or 1.8V+3.3V
  • Space-saving 8x8mm QFN56 (0.5mm pitch)
Supplier's Site Datasheet

Technical Specifications

  Microchip Technology, Inc.
Product Category Memory Chips
Product Number ZL30265
Product Name 6-Output Clock Generator int. EEPROM
Memory Category EEPROM
Unlock Full Specs
to access all available technical data

Similar Products

Controllers - DP8422ATVX-25 - Quarktwin Technology Ltd.
Specs
Operating Temperature 0 to 70 C (32 to 158 F)
Package Type 84-LCC (J-Lead)
Supply Voltage 4.5V ~ 5.5V
View Details
2 suppliers
Memory - 584271-001-00 - Quarktwin Technology Ltd.
Infineon Technologies AG
View Details
2 suppliers
Flash Memory - 1882828 - RS Components, Ltd.
RS Components, Ltd.
Specs
Memory Category Flash
Bits per Word 8 bits
Pins 8
View Details
Memory - MYX4DD3K128M72PBG2 - Micross Components, Inc.
Micross Components, Inc.
Specs
Memory Category DDR3
Operating Temperature -55 to 125 C (-67 to 257 F)
Density 1024000 kbits
View Details