TP5322 is a low threshold enhancement-mode (normally-off) transistor utilizing an advanced vertical DMOS structure and well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
Additional Features
High input impedance
Low threshold (-2.4V max.)
Low input capacitance (110pF max.)
Fast switching speeds
Low on-resistance
Low input and output leakage
Free from secondary breakdown
TP5322 is a low threshold enhancement-mode (normally-off) transistor utilizing an advanced vertical DMOS structure and well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
Additional Features
- High input impedance
- Low threshold (-2.4V max.)
- Low input capacitance (110pF max.)
- Fast switching speeds
- Low on-resistance
- Low input and output leakage
- Free from secondary breakdown
