The TP0620 is a P-channel enhancement-mode vertical DMOS FET designed for low-threshold switching applications, including TTL and CMOS logic interfaces, solid-state relays, and battery-operated systems. It is packaged in a 3-lead TO-92 case and has a drain-to-source breakdown voltage of -200 V, a maximum gate-to-source voltage of ±20 V, and a gate threshold voltage of -2.4 V maximum. The device exhibits a typical input capacitance of 85 pF and a static drain-to-source on-state resistance of 7 to 15 Ω, depending on gate drive voltage. It operates over an ambient temperature range of -55°C to +150°C with a thermal resistance of 132°C/W in the TO-92 package. The part is RoHS-compliant and meets the criteria for lead-free packaging, as indicated by the JEDEC e3 designation.
This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
Additional Features
| Microchip Technology, Inc. | |
|---|---|
| Product Category | Metal-Oxide Semiconductor FET (MOSFET) |
| Product Number | TP0620 |
| Product Name | -200V P-Channel Enhancement-Mode MOSFET |
| Polarity | P-Channel |
