The TP0604 is a P-channel enhancement-mode vertical DMOS FET designed for low-threshold switching applications, particularly in TTL and CMOS logic interfaces and battery-operated systems. It is packaged in a 3-lead TO-92 case with a maximum drain-to-source breakdown voltage of -40 V, a gate threshold voltage of -2.4 V maximum, and a static drain-to-source on-state resistance of 2 Ω maximum at -5 V gate-source voltage and -250 mA drain current. The device has a typical input capacitance of 95 pF and operates over an ambient temperature range of -55°C to +150°C with a thermal resistance of 132 °C/W. It is free from secondary breakdown and exhibits low input and output leakage.
This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
Additional Features
| Microchip Technology, Inc. | |
|---|---|
| Product Category | Metal-Oxide Semiconductor FET (MOSFET) |
| Product Number | TP0604 |
| Product Name | -40V P-Channel Enhancement-Mode MOSFET |
| Polarity | P-Channel |
