MD1810 is a high-speed quad MOSFET driver. It is designed to drive high voltage P- and N-channel MOSFETs for medical ultrasound imaging applications. The MD1810 can also be used for ultrasound metal flaw detection, Non-Destructive Testing (NDT), piezoelectric transducer drive, clock drive, and PIN diode drive. The MD1810 has four inputs which individually control four outputs. It also has an output enable (OE) pin. When OE is low, all of the outputs will be in a high impedence state regardless of their logic input control. When OE is high, the MD1810 sets the threshold logic transition to (VOE+VGND)/2. This ensures the transition to always be at half the amplitude of the logic input signal. This allows the device to have inherent propagation delay matching regardless of the logic input amplitude. The output stage of the MD1810 has separate power connections enabling the output signal L and H levels to be chosen independently from the VDD and VSS supply voltages. As an example, the input logic levels may be 0 and 1.8V, the control logic may be powered by +5.0 and -5.0V, and the output L and H levels may be varied anywhere over the range of -5.0 to +5.0V. The output stage is capable of peak currents of up to ±2.0A, depending on the supply voltages used and load capacitance present.
Additional Features
6.0ns rise and fall time with 1000pF load
2.0A peak output source/sink current
1.8 to 5.0V input CMOS compatible
5.0 to 12V total supply voltage
Smart logic threshold
Low jitter design
Four matched channels
Outputs can swing below ground
Output is high impedence when disabled
Low inductance package
High-performance thermally-enhanced QFN
MD1810 is a high-speed quad MOSFET driver. It is designed to drive high voltage P- and N-channel MOSFETs for medical ultrasound imaging applications. The MD1810 can also be used for ultrasound metal flaw detection, Non-Destructive Testing (NDT), piezoelectric transducer drive, clock drive, and PIN diode drive. The MD1810 has four inputs which individually control four outputs. It also has an output enable (OE) pin. When OE is low, all of the outputs will be in a high impedence state regardless of their logic input control. When OE is high, the MD1810 sets the threshold logic transition to (VOE+VGND)/2. This ensures the transition to always be at half the amplitude of the logic input signal. This allows the device to have inherent propagation delay matching regardless of the logic input amplitude. The output stage of the MD1810 has separate power connections enabling the output signal L and H levels to be chosen independently from the VDD and VSS supply voltages. As an example, the input logic levels may be 0 and 1.8V, the control logic may be powered by +5.0 and -5.0V, and the output L and H levels may be varied anywhere over the range of -5.0 to +5.0V. The output stage is capable of peak currents of up to ±2.0A, depending on the supply voltages used and load capacitance present.
Additional Features
- 6.0ns rise and fall time with 1000pF load
- 2.0A peak output source/sink current
- 1.8 to 5.0V input CMOS compatible
- 5.0 to 12V total supply voltage
- Smart logic threshold
- Low jitter design
- Four matched channels
- Outputs can swing below ground
- Output is high impedence when disabled
- Low inductance package
- High-performance thermally-enhanced QFN
