LPC47M182 is a 3.3V (5V tolerant) PC99a/PC2001 compliant Advanced I/O controller for Desktop PCs. It’s LPC interface supports LPC I/O and DMA cycles. The true CMOS 765B core provides 100% compatibility with IBM PC/XTTM and PC/ATTM architectures. The parallel port is compatible with IEEE 1284 EPP and ECP. The product incorporates sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake up events as well as PME support. The PCC supports multiple low power-down modes. The Motherboard Glue logic includes various power management logic including generation of nRSMRST, Power OK signal generation, 5V main and standby reference generation. There are also three LEDs to indicate power status and hard drive activity. The translation circuit converts 3.3V signals to 5V signals. SMBus main power well to resume power well isolation circuitry, included. The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M182 may be reprogrammed through the internal configuration registers. There are up to 480 (960 for Parallel Port) I/O address location options, a Serialized IRQ interface, and three DMA channels.
Family parts LPC47M182-NW
Additional Features Features:
LPC Interface
128 QFP Packaging
13 GPIO pins
Motherboard GLUE Logic
2 Fan Tachometer Inputs
Legacy I/O
CMOS 765B Floppy Disk Controller
Two 16C550A Compatible UARTs
1 Multi-Mode Parallel Port with ChiProtectTM, EPP and ECP
ACPI 1.0b/2.0 Compatible
ISA Plug-and-Play Standard Support
LPC47M182 is a 3.3V (5V tolerant) PC99a/PC2001 compliant Advanced I/O controller for Desktop PCs. It’s LPC interface supports LPC I/O and DMA cycles. The true CMOS 765B core provides 100% compatibility with IBM PC/XTTM and PC/ATTM architectures. The parallel port is compatible with IEEE 1284 EPP and ECP.
The product incorporates sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake up events as well as PME support.
The PCC supports multiple low power-down modes.
The Motherboard Glue logic includes various power management logic including generation of nRSMRST, Power OK signal generation, 5V main and standby reference generation. There are also three LEDs to indicate power status and hard drive activity. The translation circuit converts 3.3V signals to 5V signals.
SMBus main power well to resume power well isolation circuitry, included. The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M182 may be reprogrammed through the internal configuration registers. There are up to 480 (960 for Parallel Port) I/O address location options, a Serialized IRQ interface, and three DMA channels.
Family parts
LPC47M182-NW
Additional Features
Features:
- LPC Interface
- 128 QFP Packaging
- 13 GPIO pins
- Motherboard GLUE Logic
- 2 Fan Tachometer Inputs
- Legacy I/O
- CMOS 765B Floppy Disk Controller
- Two 16C550A Compatible UARTs
- 1 Multi-Mode Parallel Port with ChiProtectTM, EPP and ECP
- ACPI 1.0b/2.0 Compatible
- ISA Plug-and-Play Standard Support
