The KSZ8851 is a single-port controller chip with a SPI or 8-/16-/32-bit non-PCI CPU interface. Available in 32-/48-/128-pin packages, the KSZ8851 is for applications requiring cost-effective, high-throughput Ethernet connectivity in traditional embedded systems with MCUs or MPUs.
KSZ8851SNL/SNLI: SPI interface, 32-pin package
KSZ8851-16MLL: 8-/16-bit host bus, 48-pin package
KSZ8851-16/32MQL: 16-/32-bit host bus, 48-pin package (-16MQL) or 128-pin package (-32MQL)
The KSZ8851 is a single chip, mixed analog/digital device offering Wake-on-LAN technology for effectively addressing Fast Ethernet applications. It consists of a Fast Ethernet MAC controller, an 8-bit or 16-bit generic host processor interface and incorporates a unique dynamic memory pointer with 4-byte buffer boundary and a fully utilizable 18KB for both TX (allocated 6KB) and RX (allocated 12KB) directions in host buffer interface. The KSZ8851 is designed to be compliant with the appropriate IEEE 802.3u standards. An industrial temperature-grade version of the KSZ8851 is also available. Physical signal transmission and reception are enhanced through the use of analog circuitry, making the design more efficient and allowing for lower-power consumption. The KSZ8851 is designed using a low-power CMOS process that features a single 3.3V power supply with options for 1.8V, 2.5V or 3.3V VDD I/O. The device includes an extensive feature set that offers management information base (MIB) counters and CPU control/data interfaces with single shared data bus timing. The KSZ8851 includes unique cable diagnostics feature called LinkMD®. This feature determines the length of the cabling plant and also ascertains if there is an open or short condition in the cable. Accompanying software enables the cable length and cable conditions to be conveniently displayed. In addition, the KSZ8851 supports Hewlett Packard (HP) Auto-MDIX thereby eliminating the need to differentiate between straight or crossover cables in applications. Microchip's complimentary and confidential LANCheck® online design review service is available for customers who have selected our products for their application design-in. The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.
Additional Features
Integrated MAC and PHY Ethernet Controller compliant with IEEE 802.3/802.3u standards
Designed for high performance and high throughput applications
Supports 10BASE-T/100BASE-TX
Supports IEEE 802.3x full-duplex flow control and half-duplex back pressure collision flow control
Supports DMA-slave burst data read and write transfers
Supports IP Header (IPv4)/TCP/UDP/ICMP checksum generation and checking
Supports IPv6 TCP/UDP/ICMP checksum generation and checking
Automatic 32-bit CRC generation and checking
Simple SRAM-like host interface easily connects to most common embedded MCUs.
Supports multiple data frames for transmit and receive without address bus and byte-enable signals
Supports both Big- and Little-Endian processors
Larger internal memory with 12K Bytes for RX FIFO and 6K Bytes for TX FIFO. Programmable low, high and overrun watermark for flow control in RX FIFO
Shared data bus for Data, Address and Byte Enable
Efficient architecture design with configurable host interrupt schemes to minimize host CPU overhead and utilization
Powerful and flexible address filtering scheme
Optional to use external serial EEPROM configuration for MAC address
Single 25MHz reference clock for both PHY and MAC
HBM ESD Rating 6kV Power Modes, Power Supplies, and Packaging
Single 3.3V power supply with options for 1.8V, 2.5V and 3.3V VDD I/O
Built-in integrated 3.3V or 2.5V to 1.8V low noise regulator (LDO) for core and analog blocks
Enhanced power management feature with energy detect mode and soft power-down mode to ensure low-power dissipation during device idle periods Comprehensive LED indicator support for link, activity and 10/100 speed (2 LEDs) - User programmable
Low-power CMOS design
Commercial Temperature Range: 0°C to +70°C
Industrial Temperature Range: -40°C to +85°C
Flexible package options available in 32-pin (5mm x 5mm) QFN KSZ8851SNL/SNLI, 48-pin (7mm x 7mm) LQFP KSZ8851-16MLL or 128-pin PQFP KSZ8851-16/32MQL
The KSZ8851 is a single-port controller chip with a SPI or 8-/16-/32-bit non-PCI CPU interface.
Available in 32-/48-/128-pin packages, the KSZ8851 is for applications requiring cost-effective, high-throughput Ethernet connectivity in traditional embedded systems with MCUs or MPUs.
KSZ8851SNL/SNLI: SPI interface, 32-pin package
KSZ8851-16MLL: 8-/16-bit host bus, 48-pin package
KSZ8851-16/32MQL: 16-/32-bit host bus, 48-pin package (-16MQL) or 128-pin package (-32MQL)
The KSZ8851 is a single chip, mixed analog/digital device offering Wake-on-LAN technology for effectively addressing Fast Ethernet applications. It consists of a Fast Ethernet MAC controller, an 8-bit or 16-bit generic host processor interface and incorporates a unique dynamic memory pointer with 4-byte buffer boundary and a fully utilizable 18KB for both TX (allocated 6KB) and RX (allocated 12KB) directions in host buffer interface. The KSZ8851 is designed to be compliant with the appropriate IEEE 802.3u standards.
An industrial temperature-grade version of the KSZ8851 is also available. Physical signal transmission and reception are enhanced through the use of analog circuitry, making the design more efficient and allowing for lower-power consumption.
The KSZ8851 is designed using a low-power CMOS process that features a single 3.3V power supply with options for 1.8V, 2.5V or 3.3V VDD I/O. The device includes an extensive feature set that offers management information base (MIB) counters and CPU control/data interfaces with single shared data bus timing.
The KSZ8851 includes unique cable diagnostics feature called LinkMD®. This feature determines the length of the cabling plant and also ascertains if there is an open or short condition in the cable. Accompanying software enables the cable length and cable conditions to be conveniently displayed. In addition, the KSZ8851 supports Hewlett Packard (HP) Auto-MDIX thereby eliminating the need to differentiate between straight or crossover cables in applications.
Microchip's complimentary and confidential LANCheck® online design review service is available for customers who have selected our products for their application design-in. The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.
Additional Features
- Integrated MAC and PHY Ethernet Controller compliant with IEEE 802.3/802.3u standards
- Designed for high performance and high throughput applications
- Supports 10BASE-T/100BASE-TX
- Supports IEEE 802.3x full-duplex flow control and half-duplex back pressure collision flow control
- Supports DMA-slave burst data read and write transfers
- Supports IP Header (IPv4)/TCP/UDP/ICMP checksum generation and checking
- Supports IPv6 TCP/UDP/ICMP checksum generation and checking
- Automatic 32-bit CRC generation and checking
- Simple SRAM-like host interface easily connects to most common embedded MCUs.
- Supports multiple data frames for transmit and receive without address bus and byte-enable signals
- Supports both Big- and Little-Endian processors
- Larger internal memory with 12K Bytes for RX FIFO and 6K Bytes for TX FIFO. Programmable low, high and overrun watermark for flow control in RX FIFO
- Shared data bus for Data, Address and Byte Enable
- Efficient architecture design with configurable host interrupt schemes to minimize host CPU overhead and utilization
- Powerful and flexible address filtering scheme
- Optional to use external serial EEPROM configuration for MAC address
- Single 25MHz reference clock for both PHY and MAC
- HBM ESD Rating 6kV
Power Modes, Power Supplies, and Packaging
- Single 3.3V power supply with options for 1.8V, 2.5V and 3.3V VDD I/O
- Built-in integrated 3.3V or 2.5V to 1.8V low noise regulator (LDO) for core and analog blocks
- Enhanced power management feature with energy detect mode and soft power-down mode to ensure low-power dissipation during device idle periods Comprehensive LED indicator support for link, activity and 10/100 speed (2 LEDs) - User programmable
- Low-power CMOS design
- Commercial Temperature Range: 0°C to +70°C
- Industrial Temperature Range: -40°C to +85°C
- Flexible package options available in 32-pin (5mm x 5mm) QFN KSZ8851SNL/SNLI, 48-pin (7mm x 7mm) LQFP KSZ8851-16MLL or 128-pin PQFP KSZ8851-16/32MQL
