Microchip Technology, Inc. DSC with Dual CAN and Integrated Analog DSPIC33EP512GP806

Description
Microchip’s dsPIC33E general purpose DSC family features the highest speed 70 MIPS core with excellent performance and code density. It offers superior ADC performance, enhanced CAN communication, easier graphic display interface through 8-bit parallel master port and up to 15 DMA channels for extensive data movement. These devices are available in various packages and with extended (125°C) temp option. Additional Features Operating Conditions 3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS dsPIC33E Core Modified Harvard Architecture C Compiler Optimized Instruction Set 16-bit Wide Data Path 24-bit Wide Instructions 16x16 Integer Multiply Operations 32/16 and 16/16 Integer Divide Operations 11 Additional Instructions Two 40-bit Accumulators with Rounding and Saturation Options Flexible and Powerful Addressing modes Single-Cycle Multiply and Accumulate Single-Cycle shifts for up to 40-bit Data 16x16 Fractional Multiply/Divide Operations Integrated Analog Features Two independent ADC modules One ADC configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H One 10-bit ADC, 1.1 Msps with four S&H Eight S&H using both ADC 10-bit modules 24 analog channels (64-pin devices) up to 32 analog channels (100/121/144-pin devices) Flexible and independent ADC trigger sources Up to three Analog Comparator modules with programmable 32 voltage points references Timers / Capture / Compare / Standard PWM 9 16-bit Timers/Counters. Unused Output compares can be used as standard times for a total of 25 timers 16 Input Capture 16 Output Compare/ PWM Hardware Real-Time Clock and Calendar Peripheral Pin Select (PPS) to allow function remap Direct Memory Access (DMA) 15-channel DMA with user-selectable priority arbitration Communication Interfaces Four UART modules (15 Mbps), supporting LIN/J2602 protocols and IrDA® Four 4-Wire SPI modules (15 Mbps) Two ECAN™ modules (1 Mbaud) CAN 2.0B Support Two I2C modules (up to 1 Mbaud) with SMBus Support Data Converter Interface (DCI) module with Support for I2S and Audio Codecs PPS to allow Function Remap Parallel Master Port (PMP) Qualification and Class B Support AEC-Q100 Grade 1 (-40ºC to +125ºC) AEC-Q100 Grade 0 (-40ºC to +150ºC) Class B Safety Library, IEC 60730
Datasheet
Description
Microchip’s dsPIC33E general purpose DSC family features the highest speed 70 MIPS core with excellent performance and code density. It offers superior ADC performance, enhanced CAN communication, easier graphic display interface through 8-bit parallel master port and up to 15 DMA channels for extensive data movement. These devices are available in various packages and with extended (125°C) temp option. Additional Features Operating Conditions 3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS dsPIC33E Core Modified Harvard Architecture C Compiler Optimized Instruction Set 16-bit Wide Data Path 24-bit Wide Instructions 16x16 Integer Multiply Operations 32/16 and 16/16 Integer Divide Operations 11 Additional Instructions Two 40-bit Accumulators with Rounding and Saturation Options Flexible and Powerful Addressing modes Single-Cycle Multiply and Accumulate Single-Cycle shifts for up to 40-bit Data 16x16 Fractional Multiply/Divide Operations Integrated Analog Features Two independent ADC modules One ADC configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H One 10-bit ADC, 1.1 Msps with four S&H Eight S&H using both ADC 10-bit modules 24 analog channels (64-pin devices) up to 32 analog channels (100/121/144-pin devices) Flexible and independent ADC trigger sources Up to three Analog Comparator modules with programmable 32 voltage points references Timers / Capture / Compare / Standard PWM 9 16-bit Timers/Counters. Unused Output compares can be used as standard times for a total of 25 timers 16 Input Capture 16 Output Compare/ PWM Hardware Real-Time Clock and Calendar Peripheral Pin Select (PPS) to allow function remap Direct Memory Access (DMA) 15-channel DMA with user-selectable priority arbitration Communication Interfaces Four UART modules (15 Mbps), supporting LIN/J2602 protocols and IrDA® Four 4-Wire SPI modules (15 Mbps) Two ECAN™ modules (1 Mbaud) CAN 2.0B Support Two I2C modules (up to 1 Mbaud) with SMBus Support Data Converter Interface (DCI) module with Support for I2S and Audio Codecs PPS to allow Function Remap Parallel Master Port (PMP) Qualification and Class B Support AEC-Q100 Grade 1 (-40ºC to +125ºC) AEC-Q100 Grade 0 (-40ºC to +150ºC) Class B Safety Library, IEC 60730
Datasheet

Suppliers

Company
Product
Description
Supplier Links
DSC with Dual CAN and Integrated Analog - DSPIC33EP512GP806 - Microchip Technology, Inc.
Chandler, AZ, United States
DSC with Dual CAN and Integrated Analog
DSPIC33EP512GP806
DSC with Dual CAN and Integrated Analog DSPIC33EP512GP806
Microchip’s dsPIC33E general purpose DSC family features the highest speed 70 MIPS core with excellent performance and code density. It offers superior ADC performance, enhanced CAN communication, easier graphic display interface through 8-bit parallel master port and up to 15 DMA channels for extensive data movement. These devices are available in various packages and with extended (125°C) temp option. Additional Features Operating Conditions 3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS dsPIC33E Core Modified Harvard Architecture C Compiler Optimized Instruction Set 16-bit Wide Data Path 24-bit Wide Instructions 16x16 Integer Multiply Operations 32/16 and 16/16 Integer Divide Operations 11 Additional Instructions Two 40-bit Accumulators with Rounding and Saturation Options Flexible and Powerful Addressing modes Single-Cycle Multiply and Accumulate Single-Cycle shifts for up to 40-bit Data 16x16 Fractional Multiply/Divide Operations Integrated Analog Features Two independent ADC modules One ADC configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H One 10-bit ADC, 1.1 Msps with four S&H Eight S&H using both ADC 10-bit modules 24 analog channels (64-pin devices) up to 32 analog channels (100/121/144-pin devices) Flexible and independent ADC trigger sources Up to three Analog Comparator modules with programmable 32 voltage points references Timers / Capture / Compare / Standard PWM 9 16-bit Timers/Counters. Unused Output compares can be used as standard times for a total of 25 timers 16 Input Capture 16 Output Compare/ PWM Hardware Real-Time Clock and Calendar Peripheral Pin Select (PPS) to allow function remap Direct Memory Access (DMA) 15-channel DMA with user-selectable priority arbitration Communication Interfaces Four UART modules (15 Mbps), supporting LIN/J2602 protocols and IrDA® Four 4-Wire SPI modules (15 Mbps) Two ECAN™ modules (1 Mbaud) CAN 2.0B Support Two I2C modules (up to 1 Mbaud) with SMBus Support Data Converter Interface (DCI) module with Support for I2S and Audio Codecs PPS to allow Function Remap Parallel Master Port (PMP) Qualification and Class B Support AEC-Q100 Grade 1 (-40ºC to +125ºC) AEC-Q100 Grade 0 (-40ºC to +150ºC) Class B Safety Library, IEC 60730

Microchip’s dsPIC33E general purpose DSC family features the highest speed 70 MIPS core with excellent performance and code density. It offers superior ADC performance, enhanced CAN communication, easier graphic display interface through 8-bit parallel master port and up to 15 DMA channels for extensive data movement. These devices are available in various packages and with extended (125°C) temp option.

Additional Features

  • Operating Conditions
    • 3.0V to 3.6V, -40ºC to +125ºC, DC to 60 MIPS
    • 3.0V to 3.6V, -40ºC to +85ºC, DC to 70 MIPS
  • dsPIC33E Core
    • Modified Harvard Architecture
    • C Compiler Optimized Instruction Set
    • 16-bit Wide Data Path
    • 24-bit Wide Instructions
    • 16x16 Integer Multiply Operations
    • 32/16 and 16/16 Integer Divide Operations
    • 11 Additional Instructions
    • Two 40-bit Accumulators with Rounding and Saturation Options
    • Flexible and Powerful Addressing modes
    • Single-Cycle Multiply and Accumulate
    • Single-Cycle shifts for up to 40-bit Data
    • 16x16 Fractional Multiply/Divide Operations
  • Integrated Analog Features
    • Two independent ADC modules
    • One ADC configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H
    • One 10-bit ADC, 1.1 Msps with four S&H
    • Eight S&H using both ADC 10-bit modules
    • 24 analog channels (64-pin devices) up to 32 analog channels (100/121/144-pin devices)
    • Flexible and independent ADC trigger sources
    • Up to three Analog Comparator modules with programmable 32 voltage points references
  • Timers / Capture / Compare / Standard PWM
    • 9 16-bit Timers/Counters. Unused Output compares can be used as standard times for a total of 25 timers
    • 16 Input Capture
    • 16 Output Compare/ PWM
    • Hardware Real-Time Clock and Calendar
    • Peripheral Pin Select (PPS) to allow function remap
  • Direct Memory Access (DMA)
    • 15-channel DMA with user-selectable priority arbitration
  • Communication Interfaces
    • Four UART modules (15 Mbps), supporting LIN/J2602 protocols and IrDA®
    • Four 4-Wire SPI modules (15 Mbps)
    • Two ECAN™ modules (1 Mbaud) CAN 2.0B Support
    • Two I2C modules (up to 1 Mbaud) with SMBus Support
    • Data Converter Interface (DCI) module with Support for I2S and Audio Codecs
    • PPS to allow Function Remap
    • Parallel Master Port (PMP)
  • Qualification and Class B Support
    • AEC-Q100 Grade 1 (-40ºC to +125ºC)
    • AEC-Q100 Grade 0 (-40ºC to +150ºC)
    • Class B Safety Library, IEC 60730
Supplier's Site Datasheet

Technical Specifications

  Microchip Technology, Inc.
Product Category Digital Signal Processors (DSP)
Product Number DSPIC33EP512GP806
Product Name DSC with Dual CAN and Integrated Analog
Data Bus 16-Bit
Supply Voltage -3.3V; -3V; 3 ~ 3.6
Package Type Other; ['TQFP', 'QFN']
Pin Count 64
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