Microchip Technology, Inc. 64 Kb SPI Serial EERAM 48L640

Description
EERAM is an SRAM that doesn't lose its content on a power disruption. Inside each memory cell, transparent to the user, are nonvolatile transistors that capture the SRAM content and hold it through power loss events. On power restore, the SRAM is reloaded with its last content and SRAM operation can continue. Additional Features 8,192 x 8 bit Serial SRAM with internal nonvolatile data backup High-Speed SPI Interface: Up to 66MHz with Schmitt trigger inputs for noise suppression Low-Power CMOS Technology: Active current: 5 mA (maximum); Standby current: 500 μA (maximum); Hibernate current: 3 μA (maximum) Cell-Based Nonvolatile Backup mirrors SRAM array cell-for-cell and transfers all data to/from SRAM cells in parallel (all cells at same time) Invisible-to-User Data Transfers: VCC level monitored inside device, SRAM automatically saved on power disrupt, and SRAM automatically restored on VCC return 100,000 Backups Minimum (at 20°C) 100 years retention (at 20°C) Operating Voltage Range: 2.7V-3.6V Temperature Range Industrial (I) -40 to 85ºC, Extended (E) -40 to 125ºC 8-SOIC (150mil wide) package; 8-DFN (2x3mm) package
Datasheet
Description
EERAM is an SRAM that doesn't lose its content on a power disruption. Inside each memory cell, transparent to the user, are nonvolatile transistors that capture the SRAM content and hold it through power loss events. On power restore, the SRAM is reloaded with its last content and SRAM operation can continue. Additional Features 8,192 x 8 bit Serial SRAM with internal nonvolatile data backup High-Speed SPI Interface: Up to 66MHz with Schmitt trigger inputs for noise suppression Low-Power CMOS Technology: Active current: 5 mA (maximum); Standby current: 500 μA (maximum); Hibernate current: 3 μA (maximum) Cell-Based Nonvolatile Backup mirrors SRAM array cell-for-cell and transfers all data to/from SRAM cells in parallel (all cells at same time) Invisible-to-User Data Transfers: VCC level monitored inside device, SRAM automatically saved on power disrupt, and SRAM automatically restored on VCC return 100,000 Backups Minimum (at 20°C) 100 years retention (at 20°C) Operating Voltage Range: 2.7V-3.6V Temperature Range Industrial (I) -40 to 85ºC, Extended (E) -40 to 125ºC 8-SOIC (150mil wide) package; 8-DFN (2x3mm) package
Datasheet

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64 Kb SPI Serial EERAM - 48L640 - Microchip Technology, Inc.
Chandler, AZ, United States
64 Kb SPI Serial EERAM
48L640
64 Kb SPI Serial EERAM 48L640
EERAM is an SRAM that doesn't lose its content on a power disruption. Inside each memory cell, transparent to the user, are nonvolatile transistors that capture the SRAM content and hold it through power loss events. On power restore, the SRAM is reloaded with its last content and SRAM operation can continue. Additional Features 8,192 x 8 bit Serial SRAM with internal nonvolatile data backup High-Speed SPI Interface: Up to 66MHz with Schmitt trigger inputs for noise suppression Low-Power CMOS Technology: Active current: 5 mA (maximum); Standby current: 500 μA (maximum); Hibernate current: 3 μA (maximum) Cell-Based Nonvolatile Backup mirrors SRAM array cell-for-cell and transfers all data to/from SRAM cells in parallel (all cells at same time) Invisible-to-User Data Transfers: VCC level monitored inside device, SRAM automatically saved on power disrupt, and SRAM automatically restored on VCC return 100,000 Backups Minimum (at 20°C) 100 years retention (at 20°C) Operating Voltage Range: 2.7V-3.6V Temperature Range Industrial (I) -40 to 85ºC, Extended (E) -40 to 125ºC 8-SOIC (150mil wide) package; 8-DFN (2x3mm) package

EERAM is an SRAM that doesn't lose its content on a power disruption. Inside each memory cell, transparent to the user, are nonvolatile transistors that capture the SRAM content and hold it through power loss events. On power restore, the SRAM is reloaded with its last content and SRAM operation can continue.

Additional Features

  • 8,192 x 8 bit Serial SRAM with internal nonvolatile data backup
  • High-Speed SPI Interface: Up to 66MHz with Schmitt trigger inputs for noise suppression
  • Low-Power CMOS Technology: Active current: 5 mA (maximum); Standby current: 500 μA (maximum); Hibernate current: 3 μA (maximum)
  • Cell-Based Nonvolatile Backup mirrors SRAM array cell-for-cell and transfers all data to/from SRAM cells in parallel (all cells at same time)
  • Invisible-to-User Data Transfers: VCC level monitored inside device, SRAM automatically saved on power disrupt, and SRAM automatically restored on VCC return
  • 100,000 Backups Minimum (at 20°C)
  • 100 years retention (at 20°C)
  • Operating Voltage Range: 2.7V-3.6V
  • Temperature Range Industrial (I) -40 to 85ºC, Extended (E) -40 to 125ºC
  • 8-SOIC (150mil wide) package; 8-DFN (2x3mm) package
Supplier's Site Datasheet

Technical Specifications

  Microchip Technology, Inc.
Product Category Transistors
Product Number 48L640
Product Name 64 Kb SPI Serial EERAM
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