Lansdale Semiconductor, Inc. Dual J-K Edge-Triggered Flip-Flop 54S112/E,F

Description
The 54S00/74S00 series of product is fabricated with a non-saturating Schottky clamped transistor technique. This family of TTL product consists of very high performance and high power devices.
Description
The 54S00/74S00 series of product is fabricated with a non-saturating Schottky clamped transistor technique. This family of TTL product consists of very high performance and high power devices.

Suppliers

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Dual J-K Edge-Triggered Flip-Flop - 54S112/E,F - Lansdale Semiconductor, Inc.
Phoenix, AZ, USA
Dual J-K Edge-Triggered Flip-Flop
54S112/E,F
Dual J-K Edge-Triggered Flip-Flop 54S112/E,F
The 54S00/74S00 series of product is fabricated with a non-saturating Schottky clamped transistor technique. This family of TTL product consists of very high performance and high power devices.

The 54S00/74S00 series of product is fabricated with a non-saturating Schottky clamped transistor technique. This family of TTL product consists of very high performance and high power devices.

Technical Specifications

  Lansdale Semiconductor, Inc.
Product Category Flip-Flops
Product Number 54S112/E,F
Product Name Dual J-K Edge-Triggered Flip-Flop
Flip-Flop Type J-K
Supply Voltage 7 V
Operating Temperature -55 to 125 C (-67 to 257 F)
Package Type DIP (optional feature); Lead Flat Pack
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