Lansdale Semiconductor, Inc. Dual J-K Master-Slave Flip-Flop 10535/E,F

Description
The 10500/10100 series of emitter-coupled logic is the fastest logic technology available for practical use. A conventional planar process is used for the 10K ECL series with a density of about ten gates per mm2 and a delay of 2 ns per gate.
Description
The 10500/10100 series of emitter-coupled logic is the fastest logic technology available for practical use. A conventional planar process is used for the 10K ECL series with a density of about ten gates per mm2 and a delay of 2 ns per gate.

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Dual J-K Master-Slave Flip-Flop - 10535/E,F - Lansdale Semiconductor, Inc.
Phoenix, AZ, USA
Dual J-K Master-Slave Flip-Flop
10535/E,F
Dual J-K Master-Slave Flip-Flop 10535/E,F
The 10500/10100 series of emitter-coupled logic is the fastest logic technology available for practical use. A conventional planar process is used for the 10K ECL series with a density of about ten gates per mm2 and a delay of 2 ns per gate.

The 10500/10100 series of emitter-coupled logic is the fastest logic technology available for practical use. A conventional planar process is used for the 10K ECL series with a density of about ten gates per mm2 and a delay of 2 ns per gate.

Technical Specifications

  Lansdale Semiconductor, Inc.
Product Category Flip-Flops
Product Number 10535/E,F
Product Name Dual J-K Master-Slave Flip-Flop
Flip-Flop Type J-K
Triggering Master-slave
Supply Voltage (-)8 VDC
Propagation Delay 54 ns
Operating Temperature -55 to 125 C (-67 to 257 F)
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