Integrated Device Technology 4:1 Differential-to-LVDS Clock Multiplexer 854S054AGILF

Description
The 854S054I is a 4:1 Differential-to- LVDS Clock Multiplexer which can operate up to 2.5GHz. The 854S054I has 4 selectable differential clock inputs. The PCLK , nPCLK input pairs can accept LVPECL , LVDS or CML levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL1 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 00 selects PCLK0 , nPCLK0).
Datasheet
Description
The 854S054I is a 4:1 Differential-to- LVDS Clock Multiplexer which can operate up to 2.5GHz. The 854S054I has 4 selectable differential clock inputs. The PCLK , nPCLK input pairs can accept LVPECL , LVDS or CML levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL1 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 00 selects PCLK0 , nPCLK0).
Datasheet

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4:1 Differential-to-LVDS Clock Multiplexer - 854S054AGILF - Integrated Device Technology
San Jose, CA, USA
4:1 Differential-to-LVDS Clock Multiplexer
854S054AGILF
4:1 Differential-to-LVDS Clock Multiplexer 854S054AGILF
The 854S054I is a 4:1 Differential-to- LVDS Clock Multiplexer which can operate up to 2.5GHz. The 854S054I has 4 selectable differential clock inputs. The PCLK , nPCLK input pairs can accept LVPECL , LVDS or CML levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL1 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 00 selects PCLK0 , nPCLK0).

The 854S054I is a 4:1 Differential-to- LVDS Clock Multiplexer which can operate up to 2.5GHz. The 854S054I has 4 selectable differential clock inputs. The PCLK , nPCLK input pairs can accept LVPECL , LVDS or CML levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL1 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 00 selects PCLK0 , nPCLK0).

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Technical Specifications

  Integrated Device Technology
Product Category Logic Multiplexers
Product Number 854S054AGILF
Product Name 4:1 Differential-to-LVDS Clock Multiplexer
Supply Voltage 3.135
Package Type TSSOP; TSSOP 4.4 MM 0.65MM PITCH
Logic Family LVDS
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