Integrated Device Technology 512 x 9 DualAsync FIFO, 3.3V 72V81L15PAG

Description
The 72V81 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/recepti on error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Datasheet
Description
The 72V81 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/recepti on error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Datasheet

Suppliers

Company
Product
Description
Supplier Links
512 x 9 DualAsync FIFO, 3.3V - 72V81L15PAG - Integrated Device Technology
San Jose, CA, USA
512 x 9 DualAsync FIFO, 3.3V
72V81L15PAG
512 x 9 DualAsync FIFO, 3.3V 72V81L15PAG
The 72V81 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/recepti on error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.

The 72V81 is a dual- FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72V81L15PAG
Product Name 512 x 9 DualAsync FIFO, 3.3V
Memory Category FIFO
Logic Family TTL
Access Time 15 ns
Operating Temperature 0 to 70 C (32 to 158 F)
Density 4 kbits
Unlock Full Specs
to access all available technical data

Similar Products

Integrated Circuits (ICs) - Memory - Memory - 93Z667DMQB65 - Acme Chip Technology Co., Limited
Specs
Memory Category PROM; Non-Volatile
Cycle Time 65 ns
Density 64 kbits
View Details
2 suppliers
Memory - 16-3636-01-P - Lingto Electronic Limited
Infineon Technologies AG
View Details
2 suppliers
Memory - MYX4DD3K128M64PBG2 - Micross Components, Inc.
Micross Components, Inc.
Specs
Memory Category DDR3
Operating Temperature -55 to 125 C (-67 to 257 F)
Density 1024000 kbits
View Details