Integrated Device Technology 256K x 9 SuperSync FIFO, 3.3V 72V2101L10PF8

Description
The 72V2101 is a 256K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin ( FS ) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK , is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)
Datasheet
Description
The 72V2101 is a 256K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin ( FS ) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK , is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)
Datasheet

Suppliers

Company
Product
Description
Supplier Links
256K x 9 SuperSync FIFO, 3.3V - 72V2101L10PF8 - Integrated Device Technology
San Jose, CA, USA
256K x 9 SuperSync FIFO, 3.3V
72V2101L10PF8
256K x 9 SuperSync FIFO, 3.3V 72V2101L10PF8
The 72V2101 is a 256K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin ( FS ) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK , is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)

The 72V2101 is a 256K x 9 SuperSync FIFO memory with clocked read and write controls. The Frequency Select pin ( FS ) has been removed, thus it is no longer necessary to select which of the two clock inputs, RCLK or WCLK , is running at the higher frequency. The period required by the retransmit operation and the first word data latency period is now fixed and short. (The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated on this SuperSync family.)

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72V2101L10PF8
Product Name 256K x 9 SuperSync FIFO, 3.3V
Memory Category FIFO
Logic Family TTL
Data Rate 100 MHz
Operating Temperature 0 to 70 C (32 to 158 F)
Density 2048 kbits
Unlock Full Specs
to access all available technical data

Similar Products

Memory - 16-4369-01-T - Quarktwin Technology Ltd.
Infineon Technologies AG
View Details
2 suppliers
SmartMedia Cards - 2651137 - RS Components, Ltd.
RS Components, Ltd.
Specs
Memory Category Flash
View Details
Memory - MYX4DD3K512M64PBG2 - Micross Components, Inc.
Micross Components, Inc.
Specs
Memory Category DDR3
Operating Temperature -55 to 125 C (-67 to 257 F)
Density 4096000 kbits
View Details