The 71V424 3.3V CMOS SRAM is organized as 512K x 8. All bidirectional inputs and outputs of the 71V424 are TTL -compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation.
| Integrated Device Technology | |
|---|---|
| Product Category | Memory Chips |
| Product Number | 71V424S10PHG |
| Product Name | 3.3V 512K x 8 Asynchronous Static RAM Center Pwr & Gnd Pinout |
| Memory Category | SRAM Chip |
| Access Time | 10 ns |
| Operating Temperature | 0 to 70 C (32 to 158 F) |
| Density | 4096 kbits |
| Number of Words | 512 k |
