Cypress Semiconductor Corp. CY23S08SI-4

The CY23S08SI-4 is a 3.3V zero delay buffer designed for high-speed clock distribution in applications such as PCs, workstations, and telecom systems. It features an on-chip PLL that locks to an input clock, providing a low input-to-output propagation delay of less than 350 ps and an output-to-output skew of less than 250 ps. The device operates within a frequency range of 10 MHz to 140 MHz and offers multiple configurations, allowing for versatile output frequency options. It includes two banks of four outputs, which can be three-stated, and supports power-down mode with a current draw of less than 50 OºA. The CY23S08SI-4 is packaged in a space-saving 16-pin SOIC/TSSOP format, making it suitable for compact designs.