Nexperia B.V. Dual supply 8-bit serial-in/serial-out or parallel-out shift register; 3-state 74LVC8T595BQX

Description
The 74LVC8T595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. Data is shifted on the positive-going transitions of the SHCP input. The data in the shift register is transferred to the storage register on a positive-going transition of the STCP input. If both clocks are connected together, the shift register is always one clock pulse ahead of the storage register. VCC(A) and VCC(B) can be supplied at any voltage between 1.1 V and 5.5 V making the device suitable for translating between any of the voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins MR, SHCP, STCP, OE, DS and Q7S are referenced to VCC(A) and pins Qn are referenced to VCC(B). The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when VCC(A) is at GND level, the Qn outputs are in the high-impedance OFF-state. Features and benefits Wide supply voltage range: VCC(A): 1.1 V to 5.5 V VCC(B): 1.1 V to 5.5 V High noise immunity Suspend mode Latch-up performance exceeds 100 mA per JESD 78 Class II ±24 mA output drive (VCC(A) = VCC(B) = 3.0 V) Inputs accept voltages up to 5.5 V IOFF circuitry provides partial Power-down mode operation Complies with JEDEC standards: JESD8-12A (1.1 V to 1.3 V) JESD8-11A (1.4 V to 1.6 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (3.0 V to 3.6 V) JESD12-6 (4.5 V to 5.5 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and -40 °C to +125 °C
  • Dual supply 8-bit serial-in/serial-out or parallel-out shift register; 3-state - 74LVC8T595BQX - Nexperia B.V.
    Nexperia B.V.
  • Shift Registers - 1727-7440-2-ND - DigiKey
    DigiKey
  • Shift Registers - 1727-7440-6-ND - DigiKey
    DigiKey
  • Shift Registers - 1727-7440-1-ND - DigiKey
    DigiKey
  • Shift Register, 8Bit, -40 To 125Deg C; Logic Family / Base Number Nexperia - 01AH1673 - Newark, An Avnet Company
    Newark, An Avnet Company
  • Logic - Shift Registers - 74LVC8T595BQX - Lingto Electronic Limited
    Lingto Electronic Limited
  • Integrated Circuits (ICs) - Logic - Shift Registers - 74LVC8T595BQX - Shenzhen Shengyu Electronics Technology Limited
    Shenzhen Shengyu Electronics Technology Limited
  • Shift Registers - 74LVC8T595BQX - Quarktwin Technology Ltd.
    Quarktwin Technology Ltd.
Request a Quote Datasheet
Description
The 74LVC8T595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. Data is shifted on the positive-going transitions of the SHCP input. The data in the shift register is transferred to the storage register on a positive-going transition of the STCP input. If both clocks are connected together, the shift register is always one clock pulse ahead of the storage register. VCC(A) and VCC(B) can be supplied at any voltage between 1.1 V and 5.5 V making the device suitable for translating between any of the voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins MR, SHCP, STCP, OE, DS and Q7S are referenced to VCC(A) and pins Qn are referenced to VCC(B). The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when VCC(A) is at GND level, the Qn outputs are in the high-impedance OFF-state. Features and benefits Wide supply voltage range: VCC(A): 1.1 V to 5.5 V VCC(B): 1.1 V to 5.5 V High noise immunity Suspend mode Latch-up performance exceeds 100 mA per JESD 78 Class II ±24 mA output drive (VCC(A) = VCC(B) = 3.0 V) Inputs accept voltages up to 5.5 V IOFF circuitry provides partial Power-down mode operation Complies with JEDEC standards: JESD8-12A (1.1 V to 1.3 V) JESD8-11A (1.4 V to 1.6 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (3.0 V to 3.6 V) JESD12-6 (4.5 V to 5.5 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and -40 °C to +125 °C
Request a Quote Datasheet

Suppliers

Company
Product
Description
Supplier Links
Dual supply 8-bit serial-in/serial-out or parallel-out shift register; 3-state - 74LVC8T595BQX - Nexperia B.V.
Nexperia B.V.
Nijmegen, Netherlands
Dual supply 8-bit serial-in/serial-out or parallel-out shift register; 3-state
74LVC8T595BQX
Dual supply 8-bit serial-in/serial-out or parallel-out shift register; 3-state 74LVC8T595BQX
The 74LVC8T595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. Data is shifted on the positive-going transitions of the SHCP input. The data in the shift register is transferred to the storage register on a positive-going transition of the STCP input. If both clocks are connected together, the shift register is always one clock pulse ahead of the storage register. VCC(A) and VCC(B) can be supplied at any voltage between 1.1 V and 5.5 V making the device suitable for translating between any of the voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins MR, SHCP, STCP, OE, DS and Q7S are referenced to VCC(A) and pins Qn are referenced to VCC(B). The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when VCC(A) is at GND level, the Qn outputs are in the high-impedance OFF-state. Features and benefits Wide supply voltage range: VCC(A): 1.1 V to 5.5 V VCC(B): 1.1 V to 5.5 V High noise immunity Suspend mode Latch-up performance exceeds 100 mA per JESD 78 Class II ±24 mA output drive (VCC(A) = VCC(B) = 3.0 V) Inputs accept voltages up to 5.5 V IOFF circuitry provides partial Power-down mode operation Complies with JEDEC standards: JESD8-12A (1.1 V to 1.3 V) JESD8-11A (1.4 V to 1.6 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (3.0 V to 3.6 V) JESD12-6 (4.5 V to 5.5 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and -40 °C to +125 °C

The 74LVC8T595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. Data is shifted on the positive-going transitions of the SHCP input. The data in the shift register is transferred to the storage register on a positive-going transition of the STCP input. If both clocks are connected together, the shift register is always one clock pulse ahead of the storage register.

VCC(A) and VCC(B) can be supplied at any voltage between 1.1 V and 5.5 V making the device suitable for translating between any of the voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins MR, SHCP, STCP, OE, DS and Q7S are referenced to VCC(A) and pins Qn are referenced to VCC(B).

The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when VCC(A) is at GND level, the Qn outputs are in the high-impedance OFF-state.

Features and benefits

  • Wide supply voltage range:
    • VCC(A): 1.1 V to 5.5 V
    • VCC(B): 1.1 V to 5.5 V
  • High noise immunity
  • Suspend mode
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • ±24 mA output drive (VCC(A) = VCC(B) = 3.0 V)
  • Inputs accept voltages up to 5.5 V
  • IOFF circuitry provides partial Power-down mode operation
  • Complies with JEDEC standards:
    • JESD8-12A (1.1 V to 1.3 V)
    • JESD8-11A (1.4 V to 1.6 V)
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C (3.0 V to 3.6 V)
    • JESD12-6 (4.5 V to 5.5 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
Supplier's Site Datasheet
Shift Registers - 1727-7440-2-ND - DigiKey
DigiKey
Thief River Falls, MN, United States
Shift Registers
1727-7440-2-ND
Shift Registers 1727-7440-2-ND
Shift Shift Register 8 Element 1 Bit 20-DHVQFN (4.5x2.5)

Shift Shift Register 8 Element 1 Bit 20-DHVQFN (4.5x2.5)

Buy Now Datasheet
Shift Registers - 1727-7440-6-ND - DigiKey
DigiKey
Thief River Falls, MN, United States
Shift Registers
1727-7440-6-ND
Shift Registers 1727-7440-6-ND
Shift Shift Register 8 Element 1 Bit 20-DHVQFN (4.5x2.5)

Shift Shift Register 8 Element 1 Bit 20-DHVQFN (4.5x2.5)

Buy Now Datasheet
Shift Registers - 1727-7440-1-ND - DigiKey
DigiKey
Thief River Falls, MN, United States
Shift Registers
1727-7440-1-ND
Shift Registers 1727-7440-1-ND
Shift Shift Register 8 Element 1 Bit 20-DHVQFN (4.5x2.5)

Shift Shift Register 8 Element 1 Bit 20-DHVQFN (4.5x2.5)

Buy Now Datasheet
Shift Register, 8Bit, -40 To 125Deg C; Logic Family / Base Number Nexperia - 01AH1673 - Newark, An Avnet Company
Newark, An Avnet Company
Chicago, IL, United States
Shift Register, 8Bit, -40 To 125Deg C; Logic Family / Base Number Nexperia
01AH1673
Shift Register, 8Bit, -40 To 125Deg C; Logic Family / Base Number Nexperia 01AH1673
SHIFT REGISTER, 8BIT, -40 TO 125DEG C; Logic Family / Base Number:74LVC8T595; Shift Register Function:Serial to Parallel, Serial to Serial; No. of Elements:1 Element; No. of Bits Per Element:8bit; Logic Case Style:DHVQFN; No. of RoHS Compliant: Yes

SHIFT REGISTER, 8BIT, -40 TO 125DEG C; Logic Family / Base Number:74LVC8T595; Shift Register Function:Serial to Parallel, Serial to Serial; No. of Elements:1 Element; No. of Bits Per Element:8bit; Logic Case Style:DHVQFN; No. of RoHS Compliant: Yes

Supplier's Site Datasheet
Logic - Shift Registers - 74LVC8T595BQX - Lingto Electronic Limited
Lingto Electronic Limited
Shenzhen, China
Logic - Shift Registers
74LVC8T595BQX
Logic - Shift Registers 74LVC8T595BQX
74LVC8T595BQ/SOT764/ DHVQFN20

74LVC8T595BQ/SOT764/DHVQFN20

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Shift Registers - 74LVC8T595BQX - Shenzhen Shengyu Electronics Technology Limited
Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Shift Registers
74LVC8T595BQX
Integrated Circuits (ICs) - Logic - Shift Registers 74LVC8T595BQX
74LVC8T595BQ/SOT764/ DHVQFN20

74LVC8T595BQ/SOT764/DHVQFN20

Supplier's Site
Shift Registers - 74LVC8T595BQX - Quarktwin Technology Ltd.
Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Shift Registers
74LVC8T595BQX
Shift Registers 74LVC8T595BQX
Shift Shift Register 8 Element 1 Bit 20-DHVQFN (4.5x2.5)

Shift Shift Register 8 Element 1 Bit 20-DHVQFN (4.5x2.5)

Buy Now Datasheet

Technical Specifications

  Nexperia B.V. DigiKey Newark, An Avnet Company Lingto Electronic Limited Shenzhen Shengyu Electronics Technology Limited Quarktwin Technology Ltd.
Product Category Shift Registers Shift Registers Shift Registers Shift Registers Shift Registers Shift Registers
Product Number 74LVC8T595BQX 1727-7440-2-ND 01AH1673 74LVC8T595BQX 74LVC8T595BQX 74LVC8T595BQX
Product Name Dual supply 8-bit serial-in/serial-out or parallel-out shift register; 3-state Shift Registers Shift Register, 8Bit, -40 To 125Deg C; Logic Family / Base Number Nexperia Logic - Shift Registers Integrated Circuits (ICs) - Logic - Shift Registers Shift Registers
Register Type Serial In / Serial Out - Shift Right Serial In / Parallel Out Serial In / Parallel Out Serial In / Parallel Out
Supply Voltage 1.1 - 5.5 1.1V ~ 5.5V 1.1V ~ 5.5V
Output Characteristics 3-State 3-State 3-State; Tri-State
Features ESD Protection
Package Type Other; SOT764-1 Other; 20-VFQFN Exposed Pad Other; 20-VFQFN Exposed Pad
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