Nexperia B.V. 8-bit serial-in, parallel-out shift register 74HCT164D-Q100J

Description
The 74HC164-Q100; 74HCT164-Q100 is an 8-bit serial-in/parallel-o ut shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 2.0 to 6.0 V CMOS low power dissipation High noise immunity Input levels: For 74HC164-Q100: CMOS level For 74HCT164-Q100: TTL level Gated serial data inputs Asynchronous master reset Complies with JEDEC standards JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Latch-up performance exceeds 100 mA per JESD 78 Class II Level B ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
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Description
The 74HC164-Q100; 74HCT164-Q100 is an 8-bit serial-in/parallel-o ut shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 2.0 to 6.0 V CMOS low power dissipation High noise immunity Input levels: For 74HC164-Q100: CMOS level For 74HCT164-Q100: TTL level Gated serial data inputs Asynchronous master reset Complies with JEDEC standards JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Latch-up performance exceeds 100 mA per JESD 78 Class II Level B ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
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Suppliers

Company
Product
Description
Supplier Links
8-bit serial-in, parallel-out shift register - 74HCT164D-Q100J - Nexperia B.V.
Nijmegen, Netherlands
8-bit serial-in, parallel-out shift register
74HCT164D-Q100J
8-bit serial-in, parallel-out shift register 74HCT164D-Q100J
The 74HC164-Q100; 74HCT164-Q100 is an 8-bit serial-in/parallel-o ut shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 2.0 to 6.0 V CMOS low power dissipation High noise immunity Input levels: For 74HC164-Q100: CMOS level For 74HCT164-Q100: TTL level Gated serial data inputs Asynchronous master reset Complies with JEDEC standards JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Latch-up performance exceeds 100 mA per JESD 78 Class II Level B ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

The 74HC164-Q100; 74HCT164-Q100 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the master reset input (MR) clears the register and forces all outputs LOW, independently of other inputs. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Wide supply voltage range from 2.0 to 6.0 V
  • CMOS low power dissipation
  • High noise immunity
  • Input levels:
    • For 74HC164-Q100: CMOS level
    • For 74HCT164-Q100: TTL level
  • Gated serial data inputs
  • Asynchronous master reset
  • Complies with JEDEC standards
    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints
Supplier's Site Datasheet
Shift Registers - 1727-74HCT164D-Q100JTR-ND - DigiKey
Thief River Falls, MN, United States
Shift Shift Register 1 Element 8 Bit 14-SO

Shift Shift Register 1 Element 8 Bit 14-SO

Buy Now Datasheet
Shift Registers - 74HCT164D-Q100J - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Shift Registers
74HCT164D-Q100J
Shift Registers 74HCT164D-Q100J
Shift Shift Register 1 Element 8 Bit 14-SO

Shift Shift Register 1 Element 8 Bit 14-SO

Buy Now Datasheet
Sheung Wan, Hong Kong
Counter Shift Registers
74HCT164D-Q100J
Counter Shift Registers 74HCT164D-Q100J
Counter Shift Registers 74HCT164D-Q100/SO14/ REEL 13" Q

Counter Shift Registers 74HCT164D-Q100/SO14/REEL 13" Q

Buy Now Datasheet
Logic - Shift Registers - 74HCT164D-Q100J - Lingto Electronic Limited
Shenzhen, China
Logic - Shift Registers
74HCT164D-Q100J
Logic - Shift Registers 74HCT164D-Q100J
IC SHIFT REG 8BIT SI-PO 14SOIC

IC SHIFT REG 8BIT SI-PO 14SOIC

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Shift Registers - 74HCT164D-Q100J - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Shift Registers
74HCT164D-Q100J
Integrated Circuits (ICs) - Logic - Shift Registers 74HCT164D-Q100J
IC SHIFT REG 8BIT SI-PO 14SOIC

IC SHIFT REG 8BIT SI-PO 14SOIC

Supplier's Site

Technical Specifications

  Nexperia B.V. DigiKey Quarktwin Technology Ltd. VAST STOCK CO., LIMITED Lingto Electronic Limited Shenzhen Shengyu Electronics Technology Limited
Product Category Shift Registers Shift Registers Shift Registers Shift Registers Shift Registers Shift Registers
Product Number 74HCT164D-Q100J 1727-74HCT164D-Q100JTR-ND 74HCT164D-Q100J 74HCT164D-Q100J 74HCT164D-Q100J 74HCT164D-Q100J
Product Name 8-bit serial-in, parallel-out shift register Shift Registers Shift Registers Counter Shift Registers Logic - Shift Registers Integrated Circuits (ICs) - Logic - Shift Registers
Register Type Serial In / Parallel Out Serial In / Parallel Out Serial In / Parallel Out Serial In / Parallel Out
Features ESD Protection
Package Type Other; SOT108-1 SOIC; Other; "14-SOIC (0.154"", 3.90mm Width)" SOIC; Other; 14-SOIC (0.154\", 3.90mm Width) SOIC
Supply Voltage 4.5V ~ 5.5V 4.5V ~ 5.5V
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