Nexperia B.V. Octal D-type flip-flop with reset; positive-edge trigger 74HC273PW-Q100J

Description
The 74HC273-Q100; 74HCT273-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Input levels: For 74HC273-Q100: CMOS level For 74HCT273-Q100: TTL level Common clock and master reset Eight positive edge-triggered D-type flip-flops ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automated Optical Inspection (AOI) of solder joints
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Suppliers

Company
Product
Description
Supplier Links
Octal D-type flip-flop with reset; positive-edge trigger - 74HC273PW-Q100J - Nexperia B.V.
Nijmegen, Netherlands
Octal D-type flip-flop with reset; positive-edge trigger
74HC273PW-Q100J
Octal D-type flip-flop with reset; positive-edge trigger 74HC273PW-Q100J
The 74HC273-Q100; 74HCT273-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Input levels: For 74HC273-Q100: CMOS level For 74HCT273-Q100: TTL level Common clock and master reset Eight positive edge-triggered D-type flip-flops ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automated Optical Inspection (AOI) of solder joints

The 74HC273-Q100; 74HCT273-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Wide supply voltage range from 2.0 V to 6.0 V
  • CMOS low power dissipation
  • High noise immunity
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards:
    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
  • Input levels:
    • For 74HC273-Q100: CMOS level
    • For 74HCT273-Q100: TTL level
  • Common clock and master reset
  • Eight positive edge-triggered D-type flip-flops
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • DHVQFN package with Side-Wettable Flanks enabling Automated Optical Inspection (AOI) of solder joints
Supplier's Site Datasheet
Flip Flops - 74HC273PW-Q100J - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173", 4.40mm Width)

Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173", 4.40mm Width)

Buy Now Datasheet
 - 74HC273PW-Q100J - Rochester Electronics
Newburyport, MA, United States
74HC273 - Octal D-type flip-flop with reset; positive-edge trigger

74HC273 - Octal D-type flip-flop with reset; positive-edge trigger

Supplier's Site Datasheet
Logic - Flip Flops - 74HC273PW-Q100J - Nova Technology(HK) Co.,Ltd
Futian District, Shenzhen, China
Logic - Flip Flops
74HC273PW-Q100J
Logic - Flip Flops 74HC273PW-Q100J
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173

Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 74HC273PW-Q100J - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Flip Flops
74HC273PW-Q100J
Integrated Circuits (ICs) - Logic - Flip Flops 74HC273PW-Q100J
IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP

Supplier's Site
Flip Flops - 1727-74HC273PW-Q100JCT-ND - DigiKey
Thief River Falls, MN, United States
"Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173"", 4.40mm Width)"

"Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173"", 4.40mm Width)"

Buy Now Datasheet
Flip Flops - 1727-74HC273PW-Q100JTR-ND - DigiKey
Thief River Falls, MN, United States
"Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173"", 4.40mm Width)"

"Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173"", 4.40mm Width)"

Buy Now Datasheet
Flip Flops - 1727-74HC273PW-Q100JDKR-ND - DigiKey
Thief River Falls, MN, United States
"Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173"", 4.40mm Width)"

"Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173"", 4.40mm Width)"

Buy Now Datasheet
Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia - 74AH2446 - Newark, An Avnet Company
Chicago, IL, United States
Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia
74AH2446
Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia 74AH2446
FLIP FLOP, AEC-Q100, D, -40 TO 125DEG C ROHS COMPLIANT: YES

FLIP FLOP, AEC-Q100, D, -40 TO 125DEG C ROHS COMPLIANT: YES

Supplier's Site Datasheet
Logic - Flip Flops - 74HC273PW-Q100J - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74HC273PW-Q100J
Logic - Flip Flops 74HC273PW-Q100J
IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Quarktwin Technology Ltd. Rochester Electronics Nova Technology(HK) Co.,Ltd Shenzhen Shengyu Electronics Technology Limited DigiKey Newark, An Avnet Company Lingto Electronic Limited
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74HC273PW-Q100J 74HC273PW-Q100J 74HC273PW-Q100J 74HC273PW-Q100J 74HC273PW-Q100J 1727-74HC273PW-Q100JCT-ND 74AH2446 74HC273PW-Q100J
Product Name Octal D-type flip-flop with reset; positive-edge trigger Flip Flops Logic - Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Flip Flops Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia Logic - Flip Flops
Flip-Flop Type D D D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered
Supply Voltage 2.5V; 3V; 3.3V; 3.6V; 5V; 2.0 - 6.0 2V ~ 6V 2V ~ 6V
Features ESD Protection
Propagation Delay 15 ns 26 ns
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