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Nexperia B.V. Dual JK flip-flop with set and reset; positive-edge-trigger 74HC109D,653

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Dual JK flip-flop with set and reset; positive-edge-trigger - 74HC109D,653 - Nexperia B.V.
Nijmegen, Netherlands
Dual JK flip-flop with set and reset; positive-edge-trigger
74HC109D,653
Dual JK flip-flop with set and reset; positive-edge-trigger 74HC109D,653
The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The JK design allows operation as a D-type flip-flop by connecting the J and K inputs together. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Features and benefits J and K inputs for easy D-type flip-flop Toggle flip-flop or "do nothing" mode Wide supply voltage range: For 74HC109: from 2.0 V to 6.0 V For 74HCT109: from 4.5 V to 5.5 V CMOS low power dissipation High noise immunity Input levels: For 74HC109: CMOS level For 74HCT109: TTL level Latch-up performance exceeds 100 mA per JESD 78 Class II Level B 74HC109 complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) 74HCT109 complies with JEDEC standard JESD7A (2.0 V to 6.0 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74HC109; 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The JK design allows operation as a D-type flip-flop by connecting the J and K inputs together. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

Features and benefits

  • J and K inputs for easy D-type flip-flop
  • Toggle flip-flop or "do nothing" mode
  • Wide supply voltage range:
    • For 74HC109: from 2.0 V to 6.0 V
    • For 74HCT109: from 4.5 V to 5.5 V
  • CMOS low power dissipation
  • High noise immunity
  • Input levels:
    • For 74HC109: CMOS level
    • For 74HCT109: TTL level
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • 74HC109 complies with JEDEC standards:
    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
  • 74HCT109 complies with JEDEC standard JESD7A (2.0 V to 6.0 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
Futian, Shenzhen, China
Logic ICs >> Flip Flops
74HC109D,653
Logic ICs >> Flip Flops 74HC109D,653
2V~6V 81MHz 30ns@6V,50pF JK-Type 1 2 4uA SOIC-16 Flip Flops ROHS

2V~6V 81MHz 30ns@6V,50pF JK-Type 1 2 4uA SOIC-16 Flip Flops ROHS

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 74HC109D,653 - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Flip Flops
74HC109D,653
Integrated Circuits (ICs) - Logic - Flip Flops 74HC109D,653
IC FF JK TYPE DUAL 1BIT 16SO

IC FF JK TYPE DUAL 1BIT 16SO

Supplier's Site
Flip Flops - 74HC109D,653 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flops
74HC109D,653
Flip Flops 74HC109D,653
Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Supplier's Site Datasheet
Flip Flops - 1727-74HC109D,653CT-ND - DigiKey
Thief River Falls, MN, United States
IC FF JK TYPE DUAL 1BIT 16SO

IC FF JK TYPE DUAL 1BIT 16SO

Supplier's Site Datasheet
Flip Flops - 1727-74HC109D,653DKR-ND - DigiKey
Thief River Falls, MN, United States
IC FF JK TYPE DUAL 1BIT 16SO

IC FF JK TYPE DUAL 1BIT 16SO

Supplier's Site Datasheet
Flip Flops - 1727-74HC109D,653TR-ND - DigiKey
Thief River Falls, MN, United States
Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Flip Flop 2 Element JK Type 1 Bit Positive Edge 16-SOIC (0.154", 3.90mm Width)

Supplier's Site Datasheet
Yishun, Singapore
Integrated Circuits (ICs) - Logic - Flip Flops
1370967-74HC109D,653
Integrated Circuits (ICs) - Logic - Flip Flops 1370967-74HC109D,653
Win Source Part Number: 1370967-74HC109D,653 Category: Integrated Circuits (ICs) - Logic - Flip Flops Temperature Range - Operating: -40°C ~ 125°C (TA) Fake Threat In the Open Market: 50 pct. Type: JK Type MSL Level: 1 (Unlimited) Mfr: Nexperia USA Inc. Series: 74HC Package: Tape & Reel Product Status: Active Package / Case: 16-SOIC (0.154", 3.90mm Width) Supplier Device Package: 16-SO Base Product Number: 74HC109 Mounting Type: Surface Mount HTSUS: 8542.39.0001 REACH Status: REACH Unaffected ECCN: EAR99 Function: Set(Preset) and Reset Voltage - Supply: 2V ~ 6V Output Type: Complementary Clock Frequency: 81 MHz Current - Quiescent (Iq): 4 µA Current - Output High, Low: 5.2mA, 5.2mA Max Propagation Delay @ V, Max CL: 30ns @ 6V, 50pF Number of Elements: 2 Number of Bits per Element: 1 Trigger Type: Positive Edge Input Capacitance: 3.5 pF

Win Source Part Number: 1370967-74HC109D,653
Category: Integrated Circuits (ICs) - Logic - Flip Flops
Temperature Range - Operating: -40°C ~ 125°C (TA)
Fake Threat In the Open Market: 50 pct.
Type: JK Type
MSL Level: 1 (Unlimited)
Mfr: Nexperia USA Inc.
Series: 74HC
Package: Tape & Reel
Product Status: Active
Package / Case: 16-SOIC (0.154", 3.90mm Width)
Supplier Device Package: 16-SO
Base Product Number: 74HC109
Mounting Type: Surface Mount
HTSUS: 8542.39.0001
REACH Status: REACH Unaffected
ECCN: EAR99
Function: Set(Preset) and Reset
Voltage - Supply: 2V ~ 6V
Output Type: Complementary
Clock Frequency: 81 MHz
Current - Quiescent (Iq): 4 µA
Current - Output High, Low: 5.2mA, 5.2mA
Max Propagation Delay @ V, Max CL: 30ns @ 6V, 50pF
Number of Elements: 2
Number of Bits per Element: 1
Trigger Type: Positive Edge
Input Capacitance: 3.5 pF

Supplier's Site Datasheet
Logic - Flip Flops - 74HC109D,653 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74HC109D,653
Logic - Flip Flops 74HC109D,653
IC FF JK TYPE DUAL 1BIT 16SO

IC FF JK TYPE DUAL 1BIT 16SO

Supplier's Site Datasheet
 - 74HC109D,653 - Rochester Electronics
Newburyport, MA, United States
Nexperia 74HC109D - J-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16

Nexperia 74HC109D - J-Kbar Flip-Flop, HC/UH Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. LCSC Electronics Technology (HK) Limited Shenzhen Shengyu Electronics Technology Limited Quarktwin Technology Ltd. DigiKey Win Source Electronics Lingto Electronic Limited Rochester Electronics
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74HC109D,653 74HC109D,653 74HC109D,653 74HC109D,653 1727-74HC109D,653CT-ND 1370967-74HC109D,653 74HC109D,653 74HC109D,653
Product Name Dual JK flip-flop with set and reset; positive-edge-trigger Logic ICs >> Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Flip Flops Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Logic - Flip Flops
Flip-Flop Type J-K J-K J-K J-K
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered; Positive Edge Positive-edge Triggered
Supply Voltage 2.5V; 3V; 3.3V; 3.6V; 5V; 2.0 - 6.0 2V~6V 2V ~ 6V 2V ~ 6V 2V ~ 6V
Features ESD Protection
Propagation Delay 15 ns 30 ns 30 ns 30 ns
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