Data Delay Devices, Inc. Low-Noise/Low-Power Monolithic Delay Line 3D7314

Description
FEATURES • All-silicon, low-power CMOS technology • TTL/CMOS compatible inputs and outputs • Vapor phase, IR and wave solderable • Auto-insertable (DIP pkg.) • Low ground bounce noise • Leading- and trailing-edge accuracy • Delay range: 10 through 500ns • Delay tolerance: 2% or 1.0ns • Temperature stability: ±1% typical (0C-70C) • Vdd stability: ±1% typical (4.75V-5.25V) • Minimum input pulse width: 20% of total delay • Static Idd: 1.3ma typical • Minimum input pulse width: 25% of total delay
Datasheet
Description
FEATURES • All-silicon, low-power CMOS technology • TTL/CMOS compatible inputs and outputs • Vapor phase, IR and wave solderable • Auto-insertable (DIP pkg.) • Low ground bounce noise • Leading- and trailing-edge accuracy • Delay range: 10 through 500ns • Delay tolerance: 2% or 1.0ns • Temperature stability: ±1% typical (0C-70C) • Vdd stability: ±1% typical (4.75V-5.25V) • Minimum input pulse width: 20% of total delay • Static Idd: 1.3ma typical • Minimum input pulse width: 25% of total delay
Datasheet

Suppliers

Company
Product
Description
Supplier Links
Low-Noise/Low-Power Monolithic Delay Line - 3D7314 - Data Delay Devices, Inc.
Clifton, NJ, USA
Low-Noise/Low-Power Monolithic Delay Line
3D7314
Low-Noise/Low-Power Monolithic Delay Line 3D7314
FEATURES • All-silicon, low-power CMOS technology • TTL/CMOS compatible inputs and outputs • Vapor phase, IR and wave solderable • Auto-insertable (DIP pkg.) • Low ground bounce noise • Leading- and trailing-edge accuracy • Delay range: 10 through 500ns • Delay tolerance: 2% or 1.0ns • Temperature stability: ±1% typical (0C-70C) • Vdd stability: ±1% typical (4.75V-5.25V) • Minimum input pulse width: 20% of total delay • Static Idd: 1.3ma typical • Minimum input pulse width: 25% of total delay

FEATURES

• All-silicon, low-power CMOS technology
• TTL/CMOS compatible inputs and outputs
• Vapor phase, IR and wave solderable
• Auto-insertable (DIP pkg.)
• Low ground bounce noise
• Leading- and trailing-edge accuracy
• Delay range: 10 through 500ns
• Delay tolerance: 2% or 1.0ns
• Temperature stability: ±1% typical (0C-70C)
• Vdd stability: ±1% typical (4.75V-5.25V)
• Minimum input pulse width: 20% of total delay
• Static Idd: 1.3ma typical
• Minimum input pulse width: 25% of total delay

Datasheet

Technical Specifications

  Data Delay Devices, Inc.
Product Category Delay Lines
Product Number 3D7314
Product Name Low-Noise/Low-Power Monolithic Delay Line
Delay Line Technology Digital
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