LVDS I/O and Plug-In I/O Modules
XC4VLX40/60 FPGA with up to 60K logic cells and 64 XtremeDSP slices
Acromag's PMC-LX boards use a high-performance Xilinx® Virtex-4TM FPGA, but maintain a relatively low price point. They are optimized for high-performance logic, featuring a high logic-to-feature ratio and a high I/O-to-feature ratio. Two modules let you select a FPGA to match your logic requirements.
Although there is no limit to the uses for Acromag's FPGA boards, several applications are ideal for this new technology. Typical uses include hardware simulation, communication processing, in-circuit diagnostics, military servers, and telecommunication.
Customizable FPGA (Xilinx Virtex-4 XC4VLX40/60) with up to 60K logic cells and 64 XtremeDSPTM slices
Supports both front and rear I/O
Plug-in I/O modules are available for front mezzanine
64 I/O lines supported with direct connection to FPGA via rear (J4) connector
FPGA code loads from PCI bus or flash memory
256K x 36-bit dual-ported SRAM
32Mb x 32-bit DDR DRAM
Supports dual DMA channel data transfer to CPU
Supports both 5V and 3.3V signalling
Conduction cooled 0 to 70°C
- LVDS I/O and Plug-In I/O Modules
- XC4VLX40/60 FPGA with up to 60K logic cells and 64 XtremeDSP slices
Acromag's PMC-LX boards use a high-performance Xilinx® Virtex-4TM FPGA, but maintain a relatively low price point. They are optimized for high-performance logic, featuring a high logic-to-feature ratio and a high I/O-to-feature ratio. Two modules let you select a FPGA to match your logic requirements.
Although there is no limit to the uses for Acromag's FPGA boards, several applications are ideal for this new technology. Typical uses include hardware simulation, communication processing, in-circuit diagnostics, military servers, and telecommunication.
- Customizable FPGA (Xilinx Virtex-4 XC4VLX40/60) with up to 60K logic cells and 64 XtremeDSPTM slices
- Supports both front and rear I/O
- Plug-in I/O modules are available for front mezzanine
- 64 I/O lines supported with direct connection to FPGA via rear (J4) connector
- FPGA code loads from PCI bus or flash memory
- 256K x 36-bit dual-ported SRAM
- 32Mb x 32-bit DDR DRAM
- Supports dual DMA channel data transfer to CPU
- Supports both 5V and 3.3V signalling
- Conduction cooled 0 to 70°C
