Nexperia B.V. Dual 2-input EXCLUSIVE-OR gate 74LVC2G86DC-Q100H

Description
The 74LVC2G86-Q100 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity CMOS low-power dissipation ±24 mA output drive (VCC = 3.0 V) Latch-up performance exceeds 250 mA Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
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Suppliers

Company
Product
Description
Supplier Links
Dual 2-input EXCLUSIVE-OR gate - 74LVC2G86DC-Q100H - Nexperia B.V.
Nijmegen, Netherlands
Dual 2-input EXCLUSIVE-OR gate
74LVC2G86DC-Q100H
Dual 2-input EXCLUSIVE-OR gate 74LVC2G86DC-Q100H
The 74LVC2G86-Q100 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity CMOS low-power dissipation ±24 mA output drive (VCC = 3.0 V) Latch-up performance exceeds 250 mA Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

The 74LVC2G86-Q100 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1)
    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Wide supply voltage range from 1.65 V to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • High noise immunity
  • CMOS low-power dissipation
  • ±24 mA output drive (VCC = 3.0 V)
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8B/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Gates and Inverters - 74LVC2G86DC-Q100H - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Gates and Inverters
74LVC2G86DC-Q100H
Integrated Circuits (ICs) - Logic - Gates and Inverters 74LVC2G86DC-Q100H
IC GATE XOR 2CH 2-INP 8VSSOP

IC GATE XOR 2CH 2-INP 8VSSOP

Supplier's Site
Sheung Wan, Hong Kong
Logic Gates Dual 2-input EXCLUSIVE-OR gate

Logic Gates Dual 2-input EXCLUSIVE-OR gate

Supplier's Site Datasheet
Gates and Inverters - 1727-74LVC2G86DC-Q100HTR-ND - DigiKey
Thief River Falls, MN, United States
Gates and Inverters
1727-74LVC2G86DC-Q100HTR-ND
Gates and Inverters 1727-74LVC2G86DC-Q100HTR-ND
XOR (Exclusive OR) IC 2 Channel 8-VSSOP

XOR (Exclusive OR) IC 2 Channel 8-VSSOP

Supplier's Site Datasheet
Gates and Inverters - 74LVC2G86DC-Q100H - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Gates and Inverters
74LVC2G86DC-Q100H
Gates and Inverters 74LVC2G86DC-Q100H
XOR (Exclusive OR) IC 2 Channel 8-VSSOP

XOR (Exclusive OR) IC 2 Channel 8-VSSOP

Supplier's Site Datasheet
Logic - Gates and Inverters - 74LVC2G86DC-Q100H - Lingto Electronic Limited
Shenzhen, China
Logic - Gates and Inverters
74LVC2G86DC-Q100H
Logic - Gates and Inverters 74LVC2G86DC-Q100H
IC GATE XOR 2CH 2-INP 8VSSOP

IC GATE XOR 2CH 2-INP 8VSSOP

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Shenzhen Shengyu Electronics Technology Limited VAST STOCK CO., LIMITED DigiKey Quarktwin Technology Ltd. Lingto Electronic Limited
Product Category Logic Gates Logic Gates Logic Gates Logic Gates Logic Gates Logic Gates
Product Number 74LVC2G86DC-Q100H 74LVC2G86DC-Q100H 74LVC2G86DC-Q100H 1727-74LVC2G86DC-Q100HTR-ND 74LVC2G86DC-Q100H 74LVC2G86DC-Q100H
Product Name Dual 2-input EXCLUSIVE-OR gate Integrated Circuits (ICs) - Logic - Gates and Inverters Logic Gates Gates and Inverters Gates and Inverters Logic - Gates and Inverters
Gate Type OR XOR XOR XOR; XOR (Exclusive OR) NOT; XOR
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 5V; 1.65 - 5.5 1.65V ~ 5.5V 1.65V ~ 5.5V 1.7V ~ 2V (Low), 0.7V ~ 0.8V (High)
Logic Family CMOS/LVTTL
Propagation Delay 2.3 ns 3.6 ns
Operating Temperature -40 to 125 C (-40 to 257 F) -40 to 125 C (-40 to 257 F) -40 to 125 C (-40 to 257 F)
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