Industry’s lowest active & sleep currents
150 µA / MHz - active mode
10 nA sleep w/BOD disabled
50 nA sleep w/BOD enabled
300 nA sleep w/internal RTC
600 nA sleep with external crystal
LDO voltage regulator
2 µS wake-up time
1.5 µS analog settling time
25 MHz, single-cycle 8051 compatible CPU
12-bit ADC
Up to 8 kB Flash
512 bytes of SRAM
1.8 – 3.6 V operation
Silicon Labs
Done
Datasheet
Description
Industry’s lowest active & sleep currents
150 µA / MHz - active mode
10 nA sleep w/BOD disabled
50 nA sleep w/BOD enabled
300 nA sleep w/internal RTC
600 nA sleep with external crystal
LDO voltage regulator
2 µS wake-up time
1.5 µS analog settling time
25 MHz, single-cycle 8051 compatible CPU
12-bit ADC
Up to 8 kB Flash
512 bytes of SRAM
1.8 – 3.6 V operation
Industry’s lowest active & sleep currents
150 µA / MHz - active mode
10 nA sleep w/BOD disabled
50 nA sleep w/BOD enabled
300 nA sleep w/internal RTC
600 nA sleep with external crystal
LDO voltage regulator
2 µS wake-up time
1.5 µS analog settling time
25 MHz, single-cycle 8051 compatible CPU
12-bit ADC
Up to 8 kB Flash
512 bytes of SRAM
1.8 – 3.6 V operation
