Renesas Electronics Corporation Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers MC88915EI70R2

The MC88915EI70R2 is a low skew CMOS PLL clock driver designed for high-performance clock distribution in PCs and workstations. It utilizes phase-locked loop technology to synchronize its outputs with a reference clock, providing five outputs (Q0-Q4) with less than 500 ps skew between them. The device can multiply a low frequency input clock to a higher system frequency (2X) and supports multiple frequency ratios of 1:2, 1:1, and 2:1. The input frequency range is from 5 MHz to the maximum frequency specified for the 2X_Q output. The device features a programmable divide-by option via the FREQ_SEL pin, allowing for optimal VCO operation. It includes a test mode for low frequency testing and two selectable clock inputs for redundancy. The LOCK output indicates phase lock status, although it is recommended for passive monitoring only. The MC88915 is available in a 28-lead Pb-free package, making it suitable for various applications requiring precise clock distribution.