The ISL6537A provides a complete ACPI compliant power solution for up to 4 DIMM dual channel DDR/DDR2 Memory systems. Included are both a synchronous buck controller to supply VsubDDQ/sub during S0/S1 and S3 states. During S0/S1 state, a fully integrated sink-source regulator generates an accurate (VsubDDQ/sub/2) high current VsubTT/sub voltage without the need for a negative supply. A buffered version of the VsubDDQ/sub/2 reference is provided as VsubREF/sub. A second PWM controller, which requires external MOSFET drivers, is available for regulation of the GMCH Core voltage. An LDO controller is also integrated for the CPU VsubTT/sub termination voltage regulation and the DAC.brbr The switching PWM controller drives two N-Channel MOSFETs in a synchronous-rectifie
d buck converter topology. The synchronous buck converter uses voltagemode control with fast transient response. The switching regulator provides a maximum static regulation tolerance of ±2% over line, load, and temperature ranges. The output is user-adjustable by means of external resistors down to 0.8V.brbr An integrated soft-start feature brings all outputs into regulation in a controlled manner when returning to S0/S1 state from any sleep state. During S0 the VIDPGD signal indicates that the GMCH and CPU VsubTT/sub termination voltage is within spec and operational.brbr All outputs, except VDAC, have undervoltage protection. The switching regulator also has overvoltage and overcurrent protection. Thermal shutdown is integrated.
The ISL6537A provides a complete ACPI compliant power solution for up to 4 DIMM dual channel DDR/DDR2 Memory systems. Included are both a synchronous buck controller to supply VsubDDQ/sub during S0/S1 and S3 states. During S0/S1 state, a fully integrated sink-source regulator generates an accurate (VsubDDQ/sub/2) high current VsubTT/sub voltage without the need for a negative supply. A buffered version of the VsubDDQ/sub/2 reference is provided as VsubREF/sub. A second PWM controller, which requires external MOSFET drivers, is available for regulation of the GMCH Core voltage. An LDO controller is also integrated for the CPU VsubTT/sub termination voltage regulation and the DAC.brbr The switching PWM controller drives two N-Channel MOSFETs in a synchronous-rectified buck converter topology. The synchronous buck converter uses voltagemode control with fast transient response. The switching regulator provides a maximum static regulation tolerance of ±2% over line, load, and temperature ranges. The output is user-adjustable by means of external resistors down to 0.8V.brbr An integrated soft-start feature brings all outputs into regulation in a controlled manner when returning to S0/S1 state from any sleep state. During S0 the VIDPGD signal indicates that the GMCH and CPU VsubTT/sub termination voltage is within spec and operational.brbr All outputs, except VDAC, have undervoltage protection. The switching regulator also has overvoltage and overcurrent protection. Thermal shutdown is integrated.
