Renesas Electronics Corporation Full Bridge Driver with Integrated 0.5A Power FETs for Small 3V, 5V and 12V DC Motors HIP4020IBZT

In the Functional Block Diagram of the HIP4020, the four switches and a load are arranged in an H-Configuration so that the drive voltage from terminals OUTA and OUTB can be cross-switched to change the direction of current flow in the load. This is commonly known as 4-quadrant load control. As shown in the Block Diagram, switches Q1 and Q4 are conducting or in an ON state when current flows from VsubDD/sub through Q1 to the load, and then through Q4 to terminal VsubSSB/sub; where load terminal OUTA is at a positive potential with respect to OUTB. Switches Q1 and Q4 are operated synchronously by the control logic. The control logic switches Q3 and Q2 to an open or OFF state when Q1 and Q4 are switched ON. To reverse the current flow in the load, the switch states are reversed where Q1 and Q4 are OFF while Q2 and Q3 are ON. Consequently, current then flows from VsubDD/sub through Q3, through the load, and through Q2 to terminal VsubSSA/sub, and load terminal OUTB is then at a positive potential with respect to OUTA.brbr Terminals ENA and ENB are ENABLE Inputs for the Logic A and B Input Controls. The ILF output is an Over-Current Limit Fault Flag Output and indicates a fault condition for either Output A or B or both. The VsubDD/sub and VsubSS/sub are the Power Supply reference terminals for the A and B Control Logic Inputs and ILF Output. While the VsubDD/sub positive power supply terminal is internally connected to each bridge driver, the VsubSSA/sub and VsubSSB/sub Power Supply terminals are separate and independent from VsubSS/sub and may be more negative than the VsubSS/sub ground reference terminal. The use of level shifters in the gate drive circuitry to the NMOS (low-side) output stages allows controlled level shifting of t