onsemi Clock Generators, PLLs, Frequency Synthesizers NB2309AC1DTG

The NB2309AC1DTG is a 3.3 V zero delay clock buffer designed to distribute high-speed clocks with an operating range from 15 MHz to 133 MHz. It features one reference input that drives out nine low-skew clock outputs, organized in two banks of four outputs each, plus one additional output. The device incorporates on-chip phase-locked loops (PLLs) that lock to the input clock, ensuring minimal skew between outputs, with output-to-output skew guaranteed to be less than 250 ps and device-to-device skew less than 700 ps. The clock outputs exhibit less than 200 ps cycle-to-cycle jitter, making it suitable for applications compatible with Pentium-based systems. The NB2309AC1DTG is available in a 16-pin TSSOP package and supports test modes for bypassing the PLL.