onsemi Delay Lines MC100EP196FA

The MC100EP196FA is a programmable delay chip designed for clock deskewing and timing adjustment, offering a variable delay for differential NECL/PECL input transitions. It features a programmable matrix of gates and multiplexers, allowing for a digitally selectable delay increment of approximately 10 ps, with a total programmable range of up to 10.2 ns. The FTUNE pin enables fine-tuning of the output delay from 0 to 60 ps using an analog voltage. The device operates in both PECL and NECL modes, with a maximum frequency exceeding 1.2 GHz. It includes a minimum fixed delay of 2.4 ns and supports cascading multiple PDCs for extended programmable range. The MC100EP196FA is housed in a 32-lead LQFP package and is suitable for applications requiring precise timing adjustments.