onsemi Delay Lines MC100E196FN

The MC100E196FN is a programmable delay chip designed for precise differential ECL input edge placement applications. It features a delay range of 2.0 ns with a resolution of approximately 20 ps per delay step, achieved through a combination of modified gates and a linear ramp delay adjustment. The device allows for selection of the required delay via seven address inputs, which are latched by a control signal. An additional FTUNE input enables further reduction of the minimum resolution. The chip supports cascading multiple devices for extended programmable range, requiring only one additional line for each additional unit. It operates within a PECL mode voltage range of 4.2 V to 5.7 V and NECL mode from -4.2 V to -5.7 V. The MC100E196FN includes internal pulldown resistors and offers ESD protection exceeding 1 kV. It is housed in a PLCC-28 package and is suitable for applications requiring high-speed signal processing.