Nexperia B.V. 3.3 V Octal transceiver with direction pin; inverting; 3-state 74LVT640PW,118

Description
The 74LVT640 is an 8-bit inverting transceiver with 3-state outputs. The device features an output enable (OE) and send/receive (DIR) for direction control. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs Features and benefits 3-state buffers Wide supply voltage range from 2.7 V to 3.6 V Overvoltage tolerant inputs to 5.5 V BiCMOS high speed and output drive Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Octal bidirectional bus interface Input and output interface capability to systems at 5 V supply Output capability: +64 mA and -32 mA Bus-hold data inputs eliminate the need for external pull-up resistors for unused inputs Live insertion/extraction permitted Power-up 3-state No bus current loading when output is tied to 5 V bus Latch-up performance exceeds 500 mA per JESD 78 Class II Level B Complies with JEDEC standards JESD8C (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C
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Suppliers

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3.3 V Octal transceiver with direction pin; inverting; 3-state - 74LVT640PW,118 - Nexperia B.V.
Nijmegen, Netherlands
3.3 V Octal transceiver with direction pin; inverting; 3-state
74LVT640PW,118
3.3 V Octal transceiver with direction pin; inverting; 3-state 74LVT640PW,118
The 74LVT640 is an 8-bit inverting transceiver with 3-state outputs. The device features an output enable (OE) and send/receive (DIR) for direction control. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs Features and benefits 3-state buffers Wide supply voltage range from 2.7 V to 3.6 V Overvoltage tolerant inputs to 5.5 V BiCMOS high speed and output drive Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Octal bidirectional bus interface Input and output interface capability to systems at 5 V supply Output capability: +64 mA and -32 mA Bus-hold data inputs eliminate the need for external pull-up resistors for unused inputs Live insertion/extraction permitted Power-up 3-state No bus current loading when output is tied to 5 V bus Latch-up performance exceeds 500 mA per JESD 78 Class II Level B Complies with JEDEC standards JESD8C (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C

The 74LVT640 is an 8-bit inverting transceiver with 3-state outputs. The device features an output enable (OE) and send/receive (DIR) for direction control. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs

Features and benefits

  • 3-state buffers
  • Wide supply voltage range from 2.7 V to 3.6 V
  • Overvoltage tolerant inputs to 5.5 V
  • BiCMOS high speed and output drive
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Octal bidirectional bus interface
  • Input and output interface capability to systems at 5 V supply
  • Output capability: +64 mA and -32 mA
  • Bus-hold data inputs eliminate the need for external pull-up resistors for unused inputs
  • Live insertion/extraction permitted
  • Power-up 3-state
  • No bus current loading when output is tied to 5 V bus
  • Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards
    • JESD8C (2.7 V to 3.6 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C
Supplier's Site Datasheet
Buffers, Drivers, Receivers, Transceivers - 74LVT640PW,118 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Buffers, Drivers, Receivers, Transceivers
74LVT640PW,118
Buffers, Drivers, Receivers, Transceivers 74LVT640PW,118
Transceiver, Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP

Transceiver, Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP

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Technical Specifications

  Nexperia B.V. Quarktwin Technology Ltd.
Product Category RF Transmitters RF Transceivers
Product Number 74LVT640PW,118 74LVT640PW,118
Product Name 3.3 V Octal transceiver with direction pin; inverting; 3-state Buffers, Drivers, Receivers, Transceivers
Package Type SOT360-1 Surface Mount; 20-TSSOP (0.173\", 4.40mm Width)
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