Nexperia B.V. 3.3 V 16-bit registered transceiver; 3-state 74LVT16543ADGGS

Description
The 74LVT16543A is a 16-bit registered transceiver with 3-state outputs. The device can be used as two 8-bit transceivers or one 16-bit transceiver. Data flow in each direction is controlled by intput enable (nEAB and nEBA), latch enable (nLEAB and nLEBA), and output enable (nOEAB and nOEBA) inputs. For A to B data flow, the device operates in the transparent mode when (nEAB) and (nLEAB) are LOW. A subsequent LOW-to-HIGH transition of the nLEAB input latches the data and the outputs no longer change with the inputs. A HIGH on either nEAB or nOEAB causes the outputs to assume a high-impedance OFF-state. Control of data flow from B to A is similar, but using the nEBA, nLEBA, and nOEBA inputs. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs Features and benefits 16-bit universal bus interface 3-state buffers Wide supply voltage range from 2.7 V to 3.6 V Input and output interface capability to systems at 5 V supply Overvoltage tolerant inputs to 5.5 V Direct interface with TTL levels BiCMOS high speed and output drive Output capability: +64 mA/-32 mA Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs Live insertion/extraction permitted Power-up 3-state Power-up reset No bus current loading when output is tied to 5 V bus IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 500 mA per JESD 78 Class II Level B Complies with JEDEC standards JESD8C (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C
Request a Quote Datasheet

Suppliers

Company
Product
Description
Supplier Links
3.3 V 16-bit registered transceiver; 3-state - 74LVT16543ADGGS - Nexperia B.V.
Nijmegen, Netherlands
3.3 V 16-bit registered transceiver; 3-state
74LVT16543ADGGS
3.3 V 16-bit registered transceiver; 3-state 74LVT16543ADGGS
The 74LVT16543A is a 16-bit registered transceiver with 3-state outputs. The device can be used as two 8-bit transceivers or one 16-bit transceiver. Data flow in each direction is controlled by intput enable (nEAB and nEBA), latch enable (nLEAB and nLEBA), and output enable (nOEAB and nOEBA) inputs. For A to B data flow, the device operates in the transparent mode when (nEAB) and (nLEAB) are LOW. A subsequent LOW-to-HIGH transition of the nLEAB input latches the data and the outputs no longer change with the inputs. A HIGH on either nEAB or nOEAB causes the outputs to assume a high-impedance OFF-state. Control of data flow from B to A is similar, but using the nEBA, nLEBA, and nOEBA inputs. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs Features and benefits 16-bit universal bus interface 3-state buffers Wide supply voltage range from 2.7 V to 3.6 V Input and output interface capability to systems at 5 V supply Overvoltage tolerant inputs to 5.5 V Direct interface with TTL levels BiCMOS high speed and output drive Output capability: +64 mA/-32 mA Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs Live insertion/extraction permitted Power-up 3-state Power-up reset No bus current loading when output is tied to 5 V bus IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 500 mA per JESD 78 Class II Level B Complies with JEDEC standards JESD8C (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C

The 74LVT16543A is a 16-bit registered transceiver with 3-state outputs. The device can be used as two 8-bit transceivers or one 16-bit transceiver.

Data flow in each direction is controlled by intput enable (nEAB and nEBA), latch enable (nLEAB and nLEBA), and output enable (nOEAB and nOEBA) inputs. For A to B data flow, the device operates in the transparent mode when (nEAB) and (nLEAB) are LOW. A subsequent LOW-to-HIGH transition of the nLEAB input latches the data and the outputs no longer change with the inputs. A HIGH on either nEAB or nOEAB causes the outputs to assume a high-impedance OFF-state.

Control of data flow from B to A is similar, but using the nEBA, nLEBA, and nOEBA inputs. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs

Features and benefits

  • 16-bit universal bus interface
  • 3-state buffers
  • Wide supply voltage range from 2.7 V to 3.6 V
  • Input and output interface capability to systems at 5 V supply
  • Overvoltage tolerant inputs to 5.5 V
  • Direct interface with TTL levels
  • BiCMOS high speed and output drive
  • Output capability: +64 mA/-32 mA
  • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
  • Live insertion/extraction permitted
  • Power-up 3-state
  • Power-up reset
  • No bus current loading when output is tied to 5 V bus
  • IOFF circuitry provides partial Power-down mode operation
  • Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards
    • JESD8C (2.7 V to 3.6 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C
Supplier's Site Datasheet
Buffers, Drivers, Receivers, Transceivers - 74LVT16543ADGGS - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Buffers, Drivers, Receivers, Transceivers
74LVT16543ADGGS
Buffers, Drivers, Receivers, Transceivers 74LVT16543ADGGS
Transceiver, Non-Inverting 1 Element 16 Bit per Element 3-State Output 56-TSSOP

Transceiver, Non-Inverting 1 Element 16 Bit per Element 3-State Output 56-TSSOP

Buy Now Datasheet
Buffers, Drivers, Receivers, Transceivers - 74LVT16543ADGGS - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Buffers, Drivers, Receivers, Transceivers
74LVT16543ADGGS
Buffers, Drivers, Receivers, Transceivers 74LVT16543ADGGS
Transceiver, Non-Inverting 1 Element 16 Bit per Element 3-State Output 56-TSSOP

Transceiver, Non-Inverting 1 Element 16 Bit per Element 3-State Output 56-TSSOP

Buy Now Datasheet

Technical Specifications

  Nexperia B.V. Quarktwin Technology Ltd.
Product Category RF Transmitters RF Transceivers
Product Number 74LVT16543ADGGS 74LVT16543ADGGS
Product Name 3.3 V 16-bit registered transceiver; 3-state Buffers, Drivers, Receivers, Transceivers
Package Type SOT364-1 Surface Mount; 56-TFSOP (0.240\", 6.10mm Width)
Unlock Full Specs
to access all available technical data

Similar Products

Buffers, Drivers, Receivers, Transceivers - 74LVCH245ADB,112 - Quarktwin Technology Ltd.
Specs
Package Type Surface Mount; 20-SSOP (0.209\", 5.30mm Width)
Features RoHS
Operating Temperature -40.0 to 125.0 C (-40.0 to 257.0 F)
View Details
Integrated Circuits (ICs) - Logic - Buffers, Drivers, Receivers, Transceivers - 965708-74VHC245PW,118 - Win Source Electronics
Specs
Package Type Surface Mount; SMD (SMT)
Operating Temperature -40.0 to 125.0 C (-40.0 to 257.0 F)
Supply Voltage 2 to 5.5 volts
View Details
3 suppliers
3.3 V 16-bit registered transceiver; 3-state - 74LVT16543ADGG,112 - Nexperia B.V.
Specs
Package Type SOT364-1
Operating Temperature -40.0 to 85.0 C (-40.0 to 185.0 F)
Operating Frequency 150 MHz
View Details
2 suppliers
Integrated Circuits - 74LVC245APW,118 - LIXINC Electronics Co., Limited
Specs
Package Type 20-TSSOP (0.173\", 4.40mm Width)
Operating Temperature -40.0 to 125.0 C (-40.0 to 257.0 F)
Supply Voltage 1.2 to 3.6 volts
View Details
3 suppliers