Nexperia B.V. Single D-type flip-flop with set and reset; positive edge trigger 74LVC2G74DC,125

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Single D-type flip-flop with set and reset; positive edge trigger - 74LVC2G74DC,125 - Nexperia B.V.
Nijmegen, Netherlands
Single D-type flip-flop with set and reset; positive edge trigger
74LVC2G74DC,125
Single D-type flip-flop with set and reset; positive edge trigger 74LVC2G74DC,125
The 74LVC2G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V) ±24 mA output drive (VCC = 3.0 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C

The 74LVC2G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • High noise immunity
  • Complies with JEDEC standard:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8-B/JESD36 (2.7 V to 3.6 V)
  • ±24 mA output drive (VCC = 3.0 V)
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • CMOS low power consumption
  • Latch-up performance exceeds 250 mA
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Multiple package options
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
Supplier's Site Datasheet
Shenzhen, China
Logic - Flip Flops
74LVC2G74DC,125
Logic - Flip Flops 74LVC2G74DC,125
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site Datasheet
Flip Flops - 1727-7028-6-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-7028-6-ND
Flip Flops 1727-7028-6-ND
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site Datasheet
Flip Flops - 1727-7028-1-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-7028-1-ND
Flip Flops 1727-7028-1-ND
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site Datasheet
Flip Flops - 1727-7028-2-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-7028-2-ND
Flip Flops 1727-7028-2-ND
IC FF D-TYPE SNGL 1BIT 8VSSOP

IC FF D-TYPE SNGL 1BIT 8VSSOP

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 1258724-74LVC2G74DC,125 - Win Source Electronics
Yishun, Singapore
Integrated Circuits (ICs) - Logic - Flip Flops
1258724-74LVC2G74DC,125
Integrated Circuits (ICs) - Logic - Flip Flops 1258724-74LVC2G74DC,125
Win Source Part Number: 1258724-74LVC2G74DC, 125 Category: Integrated Circuits (ICs)>Logic - Flip Flops Series: 74LVC Type: D-Type Package: Tape & Reel Standard Package: 3,000 Mounting: SMD (SMT) Output Type: Complementary Current - Output High, Low: 32mA, 32mA Function: Set(Preset) and Reset Number of Elements: 1 Number of Bits per Element: 1 Max Propagation Delay @ V, Max CL: 4.1ns @ 5V, 50pF Trigger Type: Positive Edge Input Capacitance: 4 pF Voltage - Supply: 1.65V ~ 5.5V Package / Case: 8-VFSOP (0.091", 2.30mm Width) Supplier Device Package: 8-VSSOP Temperature Range - Operating: -40°C ~ 125°C (TA) Clock Frequency: 200 MHz ECCN: EAR99 Fake Threat In the Open Market: 64 pct. MSL Level: 1 (Unlimited) Current - Quiescent (Iq): 40 µA REACH Status: REACH Unaffected HTSUS: 8542.39.0001 Mfr: Nexperia USA Inc. Other Names: 74LVC2G74DC-G,935280 391125,74LVC2G74DC-G ,74LVC2G74DC125,568- 9353-6,1727-7028-6,5 68-9353-2,568-9353-1 ,74LVC2G74DC,125,568 -9353-2,568-9353-1,1 727-7028-2,568-9353- 6,1727-7028-1 Base Product Number: 74LVC2G74

Win Source Part Number: 1258724-74LVC2G74DC,125
Category: Integrated Circuits (ICs)>Logic - Flip Flops
Series: 74LVC
Type: D-Type
Package: Tape & Reel
Standard Package: 3,000
Mounting: SMD (SMT)
Output Type: Complementary
Current - Output High, Low: 32mA, 32mA
Function: Set(Preset) and Reset
Number of Elements: 1
Number of Bits per Element: 1
Max Propagation Delay @ V, Max CL: 4.1ns @ 5V, 50pF
Trigger Type: Positive Edge
Input Capacitance: 4 pF
Voltage - Supply: 1.65V ~ 5.5V
Package / Case: 8-VFSOP (0.091", 2.30mm Width)
Supplier Device Package: 8-VSSOP
Temperature Range - Operating: -40°C ~ 125°C (TA)
Clock Frequency: 200 MHz
ECCN: EAR99
Fake Threat In the Open Market: 64 pct.
MSL Level: 1 (Unlimited)
Current - Quiescent (Iq): 40 µA
REACH Status: REACH Unaffected
HTSUS: 8542.39.0001
Mfr: Nexperia USA Inc.
Other Names: 74LVC2G74DC-G,935280391125,74LVC2G74DC-G,74LVC2G74DC125,568-9353-6,1727-7028-6,568-9353-2,568-9353-1,74LVC2G74DC,125,568-9353-2,568-9353-1,1727-7028-2,568-9353-6,1727-7028-1
Base Product Number: 74LVC2G74

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Lingto Electronic Limited DigiKey Win Source Electronics
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74LVC2G74DC,125 74LVC2G74DC,125 1727-7028-6-ND 1258724-74LVC2G74DC,125
Product Name Single D-type flip-flop with set and reset; positive edge trigger Logic - Flip Flops Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops
Flip-Flop Type D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered; Positive Edge
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 5V; 1.65 - 5.5 1.65V ~ 5.5V 1.65V ~ 5.5V
Features ESD Protection
Propagation Delay 3.5 ns 4.1 ns 4.1 ns
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