The 74LVC1G175-Q100 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output. The master reset (MR) is an asynchronous active LOW input and operates independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
IC FF D-TYPE SNGL 1BIT 6TSSOP
IC FF D-TYPE SNGL 1BIT 6TSSOP
IC FF D-TYPE SNGL 1BIT 6TSSOP
IC FF D-TYPE SNGL 1BIT 6TSSOP
FLIP FLOP, AEC-Q100, D, -40 TO 125DEG C ROHS COMPLIANT: YES
| Nexperia B.V. | Lingto Electronic Limited | DigiKey | Newark, An Avnet Company | |
|---|---|---|---|---|
| Product Category | Flip-Flops | Flip-Flops | Flip-Flops | Flip-Flops |
| Product Number | 74LVC1G175GW-Q100H | 74LVC1G175GW-Q100H | 1727-8421-6-ND | 74AH2520 |
| Product Name | Single D-type flip-flop with reset; positive-edge trigger | Logic - Flip Flops | Flip Flops | Flip Flop, Aec-Q100, D, -40 To 125Deg C Rohs Compliant Nexperia |
| Flip-Flop Type | D | D | ||
| Triggering | Positive-edge Triggered | Positive-edge Triggered | ||
| Supply Voltage | 1.8V; 2.5V; 3V; 3.3V; 3.6V; 5V; 1.65 - 5.5 | 1.65V ~ 5.5V | ||
| Features | ESD Protection | |||
| Propagation Delay | 3.1 ns | 4 ns |
