Nexperia B.V. Dual D-type flip-flop with set and reset; positive-edge trigger 74LV74D-Q100J

The 74LV74-Q100 is a dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the nQ output. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess V_CC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Wide supply voltage range from 1.0 V to 5.5 V
• Optimized for low voltage applications from 1.0 V to 3.6 V
• CMOS low power dissipation
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Direct interface with TTL levels (2.7 V to 3.6 V)
• ESD protection:
• HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
• CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

IC FF D-TYPE DUAL 1BIT 14SO

IC FF D-TYPE DUAL 1BIT 14SO

IC FF D-TYPE DUAL 1BIT 14SO

"Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154"", 3.90mm Width)"

74LV74 - Dual D-type flip-flop with set and reset; positive-edge trigger

Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154

Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-SOIC (0.154", 3.90mm Width)