Nexperia B.V. Quad D-type flip-flop; positive-edge trigger; 3-state 74HCT173D,653

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Quad D-type flip-flop; positive-edge trigger; 3-state - 74HCT173D,653 - Nexperia B.V.
Nijmegen, Netherlands
Quad D-type flip-flop; positive-edge trigger; 3-state
74HCT173D,653
Quad D-type flip-flop; positive-edge trigger; 3-state 74HCT173D,653
The 74HC173; 74HCT173 is a quad positive-edge triggered D-type flip-flop. The device features clock (CP), master reset (MR), two input enable (E1, E2) and two output enable (OE1, OE2) inputs. When the input enables are LOW, the outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on either input enable will cause the device to go into a hold mode, outputs hold their previous state independently of clock and data inputs. A HIGH on MR forces the outputs LOW independently of clock and data inputs. A HIGH on either output enable pin causes the outputs to assume a high-impedance OFF-state. Operation of the output enable inputs does not affect the state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Features and benefits Complies with JEDEC standard no. 7A Input levels: For 74HC173: CMOS level For 74HCT173: TTL level Gated input enable for hold (do nothing) mode Gated output enable control mode Edge-triggered D-type register Asynchronous master reset ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +85 °C and -40 °C to +125 °C

The 74HC173; 74HCT173 is a quad positive-edge triggered D-type flip-flop. The device features clock (CP), master reset (MR), two input enable (E1, E2) and two output enable (OE1, OE2) inputs. When the input enables are LOW, the outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on either input enable will cause the device to go into a hold mode, outputs hold their previous state independently of clock and data inputs. A HIGH on MR forces the outputs LOW independently of clock and data inputs. A HIGH on either output enable pin causes the outputs to assume a high-impedance OFF-state. Operation of the output enable inputs does not affect the state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features and benefits

  • Complies with JEDEC standard no. 7A
  • Input levels:
    • For 74HC173: CMOS level
    • For 74HCT173: TTL level
  • Gated input enable for hold (do nothing) mode
  • Gated output enable control mode
  • Edge-triggered D-type register
  • Asynchronous master reset
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
Supplier's Site Datasheet
Flip Flops - 1727-6624-2-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6624-2-ND
Flip Flops 1727-6624-2-ND
IC FF D-TYPE SNGL 4BIT 16SO

IC FF D-TYPE SNGL 4BIT 16SO

Supplier's Site Datasheet
Flip Flops - 1727-6624-6-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6624-6-ND
Flip Flops 1727-6624-6-ND
IC FF D-TYPE SNGL 4BIT 16SO

IC FF D-TYPE SNGL 4BIT 16SO

Supplier's Site Datasheet
Flip Flops - 1727-6624-1-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6624-1-ND
Flip Flops 1727-6624-1-ND
IC FF D-TYPE SNGL 4BIT 16SO

IC FF D-TYPE SNGL 4BIT 16SO

Supplier's Site Datasheet
Yishun, Singapore
Logic - Logic - Flip Flops - 74HCT173D,653
1008641-74HCT173D,653
Logic - Logic - Flip Flops - 74HCT173D,653 1008641-74HCT173D,653
Manufacturer: Nexperia USA Inc. Win Source Part Number: 1008641-74HCT173D,65 3 Packaging: Reel - TR Type: D-Type Mounting: SMD (SMT) Output Type: Tri-State, Non-Inverted Current - Output High, Low: 6mA, 6mA Number of Elements: 1 Number of Bits per Element: 4 Max Propagation Delay @ V, Max CL: 40ns @ 4.5V, 50pF Trigger Type: Positive Edge Current - Quiescent: 4μA Input Capacitance: 3.5pF Categories: Integrated Circuits Status: Active Temperature Range - Operating: -40°C to 125°C (TA) Dimension: 16-SOIC (0.154", 3.90mm Width) Purpose: Master Reset Supply Voltage - Operating: 4.5 V to 5.5 V Max Frequency: 80MHz Popularity: Medium Fake Threat In the Open Market: 40 pct. Supply and Demand Status: Balance

Manufacturer: Nexperia USA Inc.
Win Source Part Number: 1008641-74HCT173D,653
Packaging: Reel - TR
Type: D-Type
Mounting: SMD (SMT)
Output Type: Tri-State, Non-Inverted
Current - Output High, Low: 6mA, 6mA
Number of Elements: 1
Number of Bits per Element: 4
Max Propagation Delay @ V, Max CL: 40ns @ 4.5V, 50pF
Trigger Type: Positive Edge
Current - Quiescent: 4μA
Input Capacitance: 3.5pF
Categories: Integrated Circuits
Status: Active
Temperature Range - Operating: -40°C to 125°C (TA)
Dimension: 16-SOIC (0.154", 3.90mm Width)
Purpose: Master Reset
Supply Voltage - Operating: 4.5 V to 5.5 V
Max Frequency: 80MHz
Popularity: Medium
Fake Threat In the Open Market: 40 pct.
Supply and Demand Status: Balance

Supplier's Site Datasheet
Logic - Flip Flops - 74HCT173D,653 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74HCT173D,653
Logic - Flip Flops 74HCT173D,653
IC FF D-TYPE SNGL 4BIT 16SO

IC FF D-TYPE SNGL 4BIT 16SO

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. DigiKey Win Source Electronics Lingto Electronic Limited
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74HCT173D,653 1727-6624-2-ND 1008641-74HCT173D,653 74HCT173D,653
Product Name Quad D-type flip-flop; positive-edge trigger; 3-state Flip Flops Logic - Logic - Flip Flops - 74HCT173D,653 Logic - Flip Flops
Flip-Flop Type D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered; Positive Edge
Supply Voltage 5V; 4.5 - 5.5 4.5V ~ 5.5V 4.5 V ~ 5.5 V
Output Characteristics 3-State 3-State
Features ESD Protection
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