Nexperia B.V. Dual JK flip-flop with reset; negative-edge trigger 74HC73D,653

The 74HC73 is a dual negative edge triggered JK flip-flop with individual J, K, clock (nCP) and reset (nR) inputs and complementary nQ and nQ outputs. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. (nR) is asynchronous, when LOW it overrides the clock and data inputs, forcing the nQ output LOW and the nQ output HIGH. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V_CC.

Features and benefits

• CMOS low-power dissipation
• Wide supply voltage range from 2.0 to 6.0 V
• High noise immunity
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Complies with JEDEC standards
• JESD8C (2.7 V to 3.6 V)
• JESD7A (2.0 V to 6.0 V)
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Specified from -40 °C to +80 °C and from -40 °C to +125 °C

Manufacturer: Nexperia USA Inc.
Win Source Part Number: 1008538-74HC73D,653
Packaging: Reel - TR
Type: JK Type
Mounting: SMD (SMT)
Output Type: Differential
Current - Output High, Low: 5.2mA, 5.2mA
Number of Elements: 2
Number of Bits per Element: 1
Max Propagation Delay @ V, Max CL: 27ns @ 6V, 50pF
Trigger Type: Negative Edge
Current - Quiescent: 4μA
Input Capacitance: 3.5pF
Categories: Integrated Circuits
Status: Active
Temperature Range - Operating: -40°C to 125°C (TA)
Dimension: 14-SOIC (0.154", 3.90mm Width)
Purpose: Reset
Supply Voltage - Operating: 2 V to 6 V
Max Frequency: 83MHz
Popularity: Medium
Fake Threat In the Open Market: 33 pct.
Supply and Demand Status: Sufficient

IC FF JK TYPE DUAL 1BIT 14SO

IC FF JK TYPE DUAL 1BIT 14SO

IC FF JK TYPE DUAL 1BIT 14SO

IC FF JK TYPE DUAL 1BIT 14SO