The 74HC4067; 74HCT4067 is a single-pole 16-throw analog switch (SP16T) suitable for use in analog or digital 16:1 multiplexer/demultip
lexer applications. The switch features four digital select inputs (S0, S1, S2 and S3), sixteen independent inputs/outputs (Yn), a common input/output (Z) and a digital enable input (E). When Eis HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Features and benefits
Wide supply voltage range from 2.0 V to 10.0 V
Input levels S0, S1, S2, S3 and E inputs:
For 74HC4067: CMOS level
For 74HCT4067: TTL level
CMOS low power dissipation
High noise immunity
Low ON resistance:
80 Ω (typical) at VCC = 4.5 V
70 Ω (typical) at VCC = 6.0 V
60 Ω (typical) at VCC = 9.0 V
Complies with JEDEC standards:
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Typical ‘break before make’ built-in
Applications
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
The 74HC4067; 74HCT4067 is a single-pole 16-throw analog switch (SP16T) suitable for use in analog or digital 16:1 multiplexer/demultiplexer applications. The switch features four digital select inputs (S0, S1, S2 and S3), sixteen independent inputs/outputs (Yn), a common input/output (Z) and a digital enable input (E). When Eis HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Features and benefits
- Wide supply voltage range from 2.0 V to 10.0 V
- Input levels S0, S1, S2, S3 and E inputs:
- For 74HC4067: CMOS level
- For 74HCT4067: TTL level
- CMOS low power dissipation
- High noise immunity
- Low ON resistance:
- 80 Ω (typical) at VCC = 4.5 V
- 70 Ω (typical) at VCC = 6.0 V
- 60 Ω (typical) at VCC = 9.0 V
- Complies with JEDEC standards:
- JESD8C (2.7 V to 3.6 V)
- JESD7A (2.0 V to 6.0 V)
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 °C to +85 °C and -40 °C to +125 °C
- Typical ‘break before make’ built-in
Applications
- Analog multiplexing and demultiplexing
- Digital multiplexing and demultiplexing
- Signal gating
