Nexperia B.V. Dual JK flip-flop with set and reset; negative-edge trigger 74HC112PW,118

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Dual JK flip-flop with set and reset; negative-edge trigger - 74HC112PW,118 - Nexperia B.V.
Nijmegen, Netherlands
Dual JK flip-flop with set and reset; negative-edge trigger
74HC112PW,118
Dual JK flip-flop with set and reset; negative-edge trigger 74HC112PW,118
The 74HC112; 74HCT112 is a dual negative-edge triggered JK flip-flop. It features individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Features and benefits Input levels: For 74HC112: CMOS level For 74HCT112: TTL level Asynchronous set and reset Specified in compliance with JEDEC standard no. 7A ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74HC112; 74HCT112 is a dual negative-edge triggered JK flip-flop. It features individual J and K inputs, clock (nCP) set (nSD) and reset (nRD) inputs. It also has complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.

Features and benefits

  • Input levels:
    • For 74HC112: CMOS level
    • For 74HCT112: TTL level
  • Asynchronous set and reset
  • Specified in compliance with JEDEC standard no. 7A
  • ESD protection:
    • HBM JESD22-A114F exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
Flip Flops - 1727-8388-1-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-8388-1-ND
Flip Flops 1727-8388-1-ND
IC FF JK TYPE DUAL 1BIT 16TSSOP

IC FF JK TYPE DUAL 1BIT 16TSSOP

Supplier's Site Datasheet
Flip Flops - 1727-8388-2-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-8388-2-ND
Flip Flops 1727-8388-2-ND
IC FF JK TYPE DUAL 1BIT 16TSSOP

IC FF JK TYPE DUAL 1BIT 16TSSOP

Supplier's Site Datasheet
Flip Flops - 1727-8388-6-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-8388-6-ND
Flip Flops 1727-8388-6-ND
IC FF JK TYPE DUAL 1BIT 16TSSOP

IC FF JK TYPE DUAL 1BIT 16TSSOP

Supplier's Site Datasheet
Yishun, Singapore
Integrated Circuits (ICs) - Logic - Flip Flops
1040286-74HC112PW,118
Integrated Circuits (ICs) - Logic - Flip Flops 1040286-74HC112PW,118
Win Source Part Number: 1040286-74HC112PW,11 8 Category: Integrated Circuits (ICs)>Logic - Flip Flops Series: 74HC Type: JK Type Package: Tape & Reel Standard Package: 2,500 Mounting: SMD (SMT) Output Type: Complementary Current - Output High, Low: 5.2mA, 5.2mA Function: Set(Preset) and Reset Number of Elements: 2 Number of Bits per Element: 1 Max Propagation Delay @ V, Max CL: 30ns @ 6V, 50pF Trigger Type: Negative Edge Input Capacitance: 3.5 pF Voltage - Supply: 2V ~ 6V Package / Case: 16-TSSOP (0.173", 4.40mm Width) Supplier Device Package: 16-TSSOP Temperature Range - Operating: -40°C ~ 125°C (TA) Clock Frequency: 71 MHz Alternative Parts (Cross-Reference): CD74HC112PWR; CD74HC112PW; 74HC107PW,112; MC14013BDTR2G; CD4027BPWR; CD4027BPW; MC14013BDTR2; ECCN: EAR99 Fake Threat In the Open Market: 46 pct. MSL Level: 1 (Unlimited) Current - Quiescent (Iq): 4 µA REACH Status: REACH Unaffected HTSUS: 8542.39.0001 Mfr: Nexperia USA Inc. Other Names: 74HC112PW,118-ND,935 198300118,74HC112PW- T,NEXNXP74HC112PW,11 8,1727-8388-6,74HC11 2PW-T-ND,2156-74HC11 2PW,118-NEX,1727-838 8-1,1727-8388-2 Base Product Number: 74HC112

Win Source Part Number: 1040286-74HC112PW,118
Category: Integrated Circuits (ICs)>Logic - Flip Flops
Series: 74HC
Type: JK Type
Package: Tape & Reel
Standard Package: 2,500
Mounting: SMD (SMT)
Output Type: Complementary
Current - Output High, Low: 5.2mA, 5.2mA
Function: Set(Preset) and Reset
Number of Elements: 2
Number of Bits per Element: 1
Max Propagation Delay @ V, Max CL: 30ns @ 6V, 50pF
Trigger Type: Negative Edge
Input Capacitance: 3.5 pF
Voltage - Supply: 2V ~ 6V
Package / Case: 16-TSSOP (0.173", 4.40mm Width)
Supplier Device Package: 16-TSSOP
Temperature Range - Operating: -40°C ~ 125°C (TA)
Clock Frequency: 71 MHz
Alternative Parts (Cross-Reference): CD74HC112PWR; CD74HC112PW; 74HC107PW,112; MC14013BDTR2G; CD4027BPWR; CD4027BPW; MC14013BDTR2;
ECCN: EAR99
Fake Threat In the Open Market: 46 pct.
MSL Level: 1 (Unlimited)
Current - Quiescent (Iq): 4 µA
REACH Status: REACH Unaffected
HTSUS: 8542.39.0001
Mfr: Nexperia USA Inc.
Other Names: 74HC112PW,118-ND,935198300118,74HC112PW-T,NEXNXP74HC112PW,118,1727-8388-6,74HC112PW-T-ND,2156-74HC112PW,118-NEX,1727-8388-1,1727-8388-2
Base Product Number: 74HC112

Supplier's Site Datasheet
Logic - Flip Flops - 74HC112PW,118 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74HC112PW,118
Logic - Flip Flops 74HC112PW,118
IC FF JK TYPE DUAL 1BIT 16TSSOP

IC FF JK TYPE DUAL 1BIT 16TSSOP

Supplier's Site Datasheet
Flip-Flop, Jk-Type, 66Mhz, Tssop-16; Logic Family / Base Number Nexperia - 85X2869 - Newark, An Avnet Company
Chicago, IL, United States
Flip-Flop, Jk-Type, 66Mhz, Tssop-16; Logic Family / Base Number Nexperia
85X2869
Flip-Flop, Jk-Type, 66Mhz, Tssop-16; Logic Family / Base Number Nexperia 85X2869
FLIP-FLOP, JK-TYPE, 66MHZ, TSSOP-16; Logic Family / Base Number:74HC112; Flip-Flop Type:JK; Propagation Delay:-; Frequency:66MHz; Output Current:-; Logic Case Style:TSSOP; No. of Pins:16Pins; Trigger Type:Negative Edge; IC Output RoHS Compliant: Yes

FLIP-FLOP, JK-TYPE, 66MHZ, TSSOP-16; Logic Family / Base Number:74HC112; Flip-Flop Type:JK; Propagation Delay:-; Frequency:66MHz; Output Current:-; Logic Case Style:TSSOP; No. of Pins:16Pins; Trigger Type:Negative Edge; IC Output RoHS Compliant: Yes

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. DigiKey Win Source Electronics Lingto Electronic Limited Newark, An Avnet Company
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74HC112PW,118 1727-8388-1-ND 1040286-74HC112PW,118 74HC112PW,118 85X2869
Product Name Dual JK flip-flop with set and reset; negative-edge trigger Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Logic - Flip Flops Flip-Flop, Jk-Type, 66Mhz, Tssop-16; Logic Family / Base Number Nexperia
Flip-Flop Type J-K J-K
Triggering Negative-edge Triggered Negative-edge Triggered Negative-edge Triggered; Negative Edge
Supply Voltage 2.5V; 3V; 3.3V; 3.6V; 5V; 2.0 - 6.0 2V ~ 6V 2V ~ 6V
Features ESD Protection
Propagation Delay 17 ns 30 ns 30 ns
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