The 74AUP1G80 is a single positive-edge triggered D-type flip-flop. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and its complement will appear at the Q output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features and benefits
IC FF D-TYPE SNGL 1BIT 6XSON
Flip Flop 1 Element D-Type 1 Bit Positive Edge 6-XFDFN
Flip Flop 1 Element D-Type 1 Bit Positive Edge 6-XFDFN
IC FF D-TYPE SNGL 1BIT 6XSON
Nexperia B.V. | Shenzhen Shengyu Electronics Technology Limited | Quarktwin Technology Ltd. | DigiKey | Lingto Electronic Limited | |
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Product Category | Flip-Flops | Flip-Flops | Flip-Flops | Flip-Flops | Flip-Flops |
Product Number | 74AUP1G80GM,132 | 74AUP1G80GM,132 | 74AUP1G80GM,132 | 1727-74AUP1G80GM,132TR-ND | 74AUP1G80GM,132 |
Product Name | Low-power D-type flip-flop; positive-edge trigger | Integrated Circuits (ICs) - Logic - Flip Flops | Flip Flops | Flip Flops | Logic - Flip Flops |
Flip-Flop Type | D | D | D | ||
Triggering | Positive-edge Triggered | Positive-edge Triggered | |||
Supply Voltage | 0.8 - 3.6 | 3.6V; 0.8V ~ 3.6V | 0.8V ~ 3.6V | ||
Features | ESD Protection | ||||
Propagation Delay | 9.1 ns | 6.4 ns |