Nexperia B.V. 2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state 74ALVCH16374DGG:11

The 74ALVCH16374 is a 16-bit edge-triggered D-type flip-flop with bus hold inputs and 3-state outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bits. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the flip-flops.

This device is fully specified for partial power down applications using I_OFF. The I_OFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power dissipation
• MULTIBYTE™ flow-through standard pin-out architecture
• Low inductance multiple V_CC and GND pins for minimum noise and ground bounce
• Direct interface with TTL levels
• All data inputs have bus hold
• Latch-up performance exceeds 100 mA per JESD 78 Class II.A
• Output drive capability 50 Ω transmission lines at 85 °C
• I_OFF circuitry provides partial Power-down mode operation
• Current drive ±24 mA at V_CC = 3.0 V
• Complies with JEDEC standards:
• JESD8-7 (1.65 V to 1.95 V)
• JESD8-5 (2.3 V to 2.7 V)
• JESD8C/JESD36 (2.7 V to 3.6 V)

IC FF D-TYPE DUAL 8BIT 48TSSOP

IC FF D-TYPE DUAL 8BIT 48TSSOP

IC FF D-TYPE DUAL 8BIT 48TSSOP

74ALVCH16374 - 2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state

IC FF D-TYPE DUAL 8BIT 48TSSOP