Nexperia B.V. Octal D-type flip-flop; positive-edge trigger; 3-state 74ALVC374PW,118

Description
The 74ALVC374 is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 1.65 V to 3.6 V CMOS low power dissipation Overvoltage tolerant inputs to 3.6 V Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 250 mA per JESD78 Class II.A Complies with JEDEC standards: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C
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Octal D-type flip-flop; positive-edge trigger; 3-state - 74ALVC374PW,118 - Nexperia B.V.
Nijmegen, Netherlands
Octal D-type flip-flop; positive-edge trigger; 3-state
74ALVC374PW,118
Octal D-type flip-flop; positive-edge trigger; 3-state 74ALVC374PW,118
The 74ALVC374 is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range from 1.65 V to 3.6 V CMOS low power dissipation Overvoltage tolerant inputs to 3.6 V Direct interface with TTL levels IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 250 mA per JESD78 Class II.A Complies with JEDEC standards: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74ALVC374 is an octal positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.

Schmitt trigger action on all inputs makes the device tolerant of slow rise and fall times.

This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range from 1.65 V to 3.6 V
  • CMOS low power dissipation
  • Overvoltage tolerant inputs to 3.6 V
  • Direct interface with TTL levels
  • IOFF circuitry provides partial Power-down mode operation
  • Latch-up performance exceeds 250 mA per JESD78 Class II.A
  • Complies with JEDEC standards:
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C/JESD36 (2.7 V to 3.6 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
Flip Flops - 74ALVC374PW,118 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173", 4.40mm Width)

Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173", 4.40mm Width)

Buy Now Datasheet
 - 74ALVC374PW,118 - Rochester Electronics
Newburyport, MA, United States
Octal D-type flip-flop; positive-edge trigger; 3-state

Octal D-type flip-flop; positive-edge trigger; 3-state

Supplier's Site Datasheet
Flip Flops - 1727-74ALVC374PW,118CT-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP

Buy Now Datasheet
Flip Flops - 1727-74ALVC374PW,118DKR-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP

Buy Now Datasheet
Flip Flops - 1727-74ALVC374PW,118TR-ND - DigiKey
Thief River Falls, MN, United States
"Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173"", 4.40mm Width)"

"Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173"", 4.40mm Width)"

Buy Now Datasheet
Yishun, Singapore
Logic - Logic - Flip Flops - 74ALVC374PW,118
1007673-74ALVC374PW,118
Logic - Logic - Flip Flops - 74ALVC374PW,118 1007673-74ALVC374PW,118
Manufacturer: Nexperia USA Inc. Win Source Part Number: 1007673-74ALVC374PW, 118 Packaging: Reel - TR Type: D-Type Mounting: SMD (SMT) Output Type: Tri-State, Non-Inverted Current - Output High, Low: 24mA, 24mA Number of Elements: 1 Number of Bits per Element: 8 Max Propagation Delay @ V, Max CL: 3.6ns @ 3.3V, 50pF Trigger Type: Positive Edge Current - Quiescent: 10μA Input Capacitance: 3.5pF Categories: Integrated Circuits Status: Active Temperature Range - Operating: -40°C to 85°C (TA) Dimension: 20-TSSOP (0.173", 4.40mm Width) Purpose: Standard Supply Voltage - Operating: 1.65 V to 3.6 V Max Frequency: 300MHz Popularity: Medium Fake Threat In the Open Market: 31 pct. Supply and Demand Status: Balance

Manufacturer: Nexperia USA Inc.
Win Source Part Number: 1007673-74ALVC374PW,118
Packaging: Reel - TR
Type: D-Type
Mounting: SMD (SMT)
Output Type: Tri-State, Non-Inverted
Current - Output High, Low: 24mA, 24mA
Number of Elements: 1
Number of Bits per Element: 8
Max Propagation Delay @ V, Max CL: 3.6ns @ 3.3V, 50pF
Trigger Type: Positive Edge
Current - Quiescent: 10μA
Input Capacitance: 3.5pF
Categories: Integrated Circuits
Status: Active
Temperature Range - Operating: -40°C to 85°C (TA)
Dimension: 20-TSSOP (0.173", 4.40mm Width)
Purpose: Standard
Supply Voltage - Operating: 1.65 V to 3.6 V
Max Frequency: 300MHz
Popularity: Medium
Fake Threat In the Open Market: 31 pct.
Supply and Demand Status: Balance

Buy Now Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 74ALVC374PW,118 - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Flip Flops
74ALVC374PW,118
Integrated Circuits (ICs) - Logic - Flip Flops 74ALVC374PW,118
IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP

Supplier's Site
Logic - Flip Flops - 74ALVC374PW,118 - Nova Technology(HK) Co.,Ltd
Futian District, Shenzhen, China
Logic - Flip Flops
74ALVC374PW,118
Logic - Flip Flops 74ALVC374PW,118
Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173

Flip Flop 1 Element D-Type 8 Bit Positive Edge 20-TSSOP (0.173

Supplier's Site Datasheet
Logic - Flip Flops - 74ALVC374PW,118 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74ALVC374PW,118
Logic - Flip Flops 74ALVC374PW,118
IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP

Supplier's Site Datasheet
Flip-Flop, D-Type, 300Mhz, Tssop-20; Logic Family / Base Number Nexperia - 85X2773 - Newark, An Avnet Company
Chicago, IL, United States
Flip-Flop, D-Type, 300Mhz, Tssop-20; Logic Family / Base Number Nexperia
85X2773
Flip-Flop, D-Type, 300Mhz, Tssop-20; Logic Family / Base Number Nexperia 85X2773
FLIP-FLOP, D-TYPE, 300MHZ, TSSOP-20; Logic Family / Base Number:74ALVC374; Flip-Flop Type:D; Propagation Delay:-; Frequency:300MHz; Output Current:50mA; Logic Case Style:TSSOP; No. of Pins:20Pins; Trigger Type:Positive Edge; IC RoHS Compliant: Yes

FLIP-FLOP, D-TYPE, 300MHZ, TSSOP-20; Logic Family / Base Number:74ALVC374; Flip-Flop Type:D; Propagation Delay:-; Frequency:300MHz; Output Current:50mA; Logic Case Style:TSSOP; No. of Pins:20Pins; Trigger Type:Positive Edge; IC RoHS Compliant: Yes

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Quarktwin Technology Ltd. Rochester Electronics DigiKey Win Source Electronics Shenzhen Shengyu Electronics Technology Limited Nova Technology(HK) Co.,Ltd Lingto Electronic Limited Newark, An Avnet Company
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74ALVC374PW,118 74ALVC374PW,118 74ALVC374PW,118 1727-74ALVC374PW,118CT-ND 1007673-74ALVC374PW,118 74ALVC374PW,118 74ALVC374PW,118 74ALVC374PW,118 85X2773
Product Name Octal D-type flip-flop; positive-edge trigger; 3-state Flip Flops Flip Flops Logic - Logic - Flip Flops - 74ALVC374PW,118 Integrated Circuits (ICs) - Logic - Flip Flops Logic - Flip Flops Logic - Flip Flops Flip-Flop, D-Type, 300Mhz, Tssop-20; Logic Family / Base Number Nexperia
Flip-Flop Type D D D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered; Positive Edge Positive-edge Triggered
Supply Voltage 1.8V; 2.5V; 3V; 3.3V; 3.6V; 1.65 - 3.6 3.6V; 1.65V ~ 3.6V 1.65V ~ 3.6V 1.65 V ~ 3.6 V
Output Characteristics 3-State 3-State 3-State
Features ESD Protection
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