Nexperia B.V. Octal D-type flip-flop with reset; positive-edge trigger 74AHCT273BQ,115

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Octal D-type flip-flop with reset; positive-edge trigger - 74AHCT273BQ,115 - Nexperia B.V.
Nijmegen, Netherlands
Octal D-type flip-flop with reset; positive-edge trigger
74AHCT273BQ,115
Octal D-type flip-flop with reset; positive-edge trigger 74AHCT273BQ,115
The 74AHC273; 74AHCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. Features and benefits Wide supply voltage range from 2.0 to 5.5 V Overvoltage tolerant inputs to 5.5 V High noise immunity CMOS low power dissipation Balanced propagation delays All inputs have Schmitt-trigger actions Ideal buffer for MOS microcontroller or memory Common clock and master reset Latch-up performance exceeds 100 mA per JESD 78 Class II Level A Input levels: For 74AHC273: CMOS level For 74AHCT273: TTL level ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74AHC273; 74AHCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding D inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments.

Features and benefits

  • Wide supply voltage range from 2.0 to 5.5 V
  • Overvoltage tolerant inputs to 5.5 V
  • High noise immunity
  • CMOS low power dissipation
  • Balanced propagation delays
  • All inputs have Schmitt-trigger actions
  • Ideal buffer for MOS microcontroller or memory
  • Common clock and master reset
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
  • Input levels:
    • For 74AHC273: CMOS level
    • For 74AHCT273: TTL level
  • ESD protection:
    • HBM JESD22-A114E exceeds 2000 V
    • MM JESD22-A115-A exceeds 200 V
    • CDM JESD22-C101C exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
 - 74AHCT273BQ,115 - Rochester Electronics
Newburyport, MA, United States
Nexperia 74AHCT273BQ - D Flip-Flop, AHCT/VHCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PQCC20

Nexperia 74AHCT273BQ - D Flip-Flop, AHCT/VHCT Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PQCC20

Supplier's Site Datasheet
Flip Flops - 1727-74AHCT273BQ,115DKR-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE SNGL 8BIT 20DHVQFN

IC FF D-TYPE SNGL 8BIT 20DHVQFN

Supplier's Site Datasheet
Flip Flops - 1727-74AHCT273BQ,115TR-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE SNGL 8BIT 20DHVQFN

IC FF D-TYPE SNGL 8BIT 20DHVQFN

Supplier's Site Datasheet
Flip Flops - 1727-74AHCT273BQ,115CT-ND - DigiKey
Thief River Falls, MN, United States
IC FF D-TYPE SNGL 8BIT 20DHVQFN

IC FF D-TYPE SNGL 8BIT 20DHVQFN

Supplier's Site Datasheet
Logic - Flip Flops - 74AHCT273BQ,115 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74AHCT273BQ,115
Logic - Flip Flops 74AHCT273BQ,115
IC FF D-TYPE SNGL 8BIT 20DHVQFN

IC FF D-TYPE SNGL 8BIT 20DHVQFN

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Rochester Electronics DigiKey Lingto Electronic Limited
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74AHCT273BQ,115 74AHCT273BQ,115 1727-74AHCT273BQ,115DKR-ND 74AHCT273BQ,115
Product Name Octal D-type flip-flop with reset; positive-edge trigger Flip Flops Logic - Flip Flops
Flip-Flop Type D D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered
Supply Voltage 5V; 4.5 - 5.5 4.5V ~ 5.5V
Features ESD Protection
Propagation Delay 4 ns 9.2 ns
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