Nexperia B.V. Octal D-type flip-flop; positive-edge trigger; 3-state 74AHC374PW,118

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Octal D-type flip-flop; positive-edge trigger; 3-state - 74AHC374PW,118 - Nexperia B.V.
Nijmegen, Netherlands
Octal D-type flip-flop; positive-edge trigger; 3-state
74AHC374PW,118
Octal D-type flip-flop; positive-edge trigger; 3-state 74AHC374PW,118
The 74AHC374; 74AHCT374 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC374; 74AHCT374 comprises eight D-type flip-flops featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A clock input (CP) and an output enable input (OE) are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the set-up and hold times requirements for the LOW-to-HIGH CP transition. When OE is LOW the content of the eight flip-flops is available at the outputs. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Features and benefits Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than VCC Common 3-state output enable input Input levels: For 74AHC374: CMOS level For 74AHCT374: TTL level ESD protection: HBM EIA/JESD22-A114E exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101C exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74AHC374; 74AHCT374 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.

The 74AHC374; 74AHCT374 comprises eight D-type flip-flops featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A clock input (CP) and an output enable input (OE) are common to all flip-flops.

The eight flip-flops will store the state of their individual D inputs that meet the set-up and hold times requirements for the LOW-to-HIGH CP transition.

When OE is LOW the content of the eight flip-flops is available at the outputs. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.

Features and benefits

  • Balanced propagation delays
  • All inputs have Schmitt-trigger actions
  • Inputs accept voltages higher than VCC
  • Common 3-state output enable input
  • Input levels:
    • For 74AHC374: CMOS level
    • For 74AHCT374: TTL level
  • ESD protection:
    • HBM EIA/JESD22-A114E exceeds 2000 V
    • MM EIA/JESD22-A115-A exceeds 200 V
    • CDM EIA/JESD22-C101C exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
Shenzhen, China
Logic - Flip Flops
74AHC374PW,118
Logic - Flip Flops 74AHC374PW,118
IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP

Supplier's Site Datasheet
Flip Flops - 1727-6525-1-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6525-1-ND
Flip Flops 1727-6525-1-ND
IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP

Supplier's Site Datasheet
Flip Flops - 1727-6525-6-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6525-6-ND
Flip Flops 1727-6525-6-ND
IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP

Supplier's Site Datasheet
Flip Flops - 1727-6525-2-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6525-2-ND
Flip Flops 1727-6525-2-ND
IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Lingto Electronic Limited DigiKey
Product Category Flip-Flops Flip-Flops Flip-Flops
Product Number 74AHC374PW,118 74AHC374PW,118 1727-6525-1-ND
Product Name Octal D-type flip-flop; positive-edge trigger; 3-state Logic - Flip Flops Flip Flops
Flip-Flop Type D D
Triggering Positive-edge Triggered Positive-edge Triggered
Supply Voltage 2.5V; 3V; 3.3V; 3.6V; 5V; 2.0 - 5.5 2V ~ 5.5V
Output Characteristics 3-State 3-State
Features ESD Protection
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