The ZL40264 is part of a family of high-performance, ultra-low jitter and low power PCIe Gen 1 to 5, Intel QPI fanout buffers with individual output enable pins. Using the 4 output ZL40264 and utilizing the individual output pin, you can create hot-swappable PCIe clocktrees. Applications include PCI Express generation 1/2/3/4/5 clock distribution, Intel QPI and UPI distribution, Servers, storage and data centers, switches and routers.
For product comparison, please consider: ZL40262
Additional Features
One differential input which accepts any differential format.
Two (ZL40262)/Four(ZL402
64) differential HCSL outputs
Ultra-low additive jitter: 24 fs (in 12 kHz to 20 MHz integration band at 100 MHz clock frequency)
Supports clock frequencies from 0 to 400 MHz
Supports 2.5V or 3.3V power supplies for HCSL outputs
Embedded Low Drop Out (LDO) Voltage regulator provides superior power supply noise rejection
Maximum output to output skew of 40 ps
Individual output enable pin for each differential pair
Transparent for spread-spectrum clock
The ZL40264 is part of a family of high-performance, ultra-low jitter and low power PCIe Gen 1 to 5, Intel QPI fanout buffers with individual output enable pins. Using the 4 output ZL40264 and utilizing the individual output pin, you can create hot-swappable PCIe clocktrees. Applications include PCI Express generation 1/2/3/4/5 clock distribution, Intel QPI and UPI distribution, Servers, storage and data centers, switches and routers.
For product comparison, please consider: ZL40262
Additional Features
- One differential input which accepts any differential format.
- Two (ZL40262)/Four(ZL40264) differential HCSL outputs
- Ultra-low additive jitter: 24 fs (in 12 kHz to 20 MHz integration band at 100 MHz clock frequency)
- Supports clock frequencies from 0 to 400 MHz
- Supports 2.5V or 3.3V power supplies for HCSL outputs
- Embedded Low Drop Out (LDO) Voltage regulator provides superior power supply noise rejection
- Maximum output to output skew of 40 ps
- Individual output enable pin for each differential pair
- Transparent for spread-spectrum clock
