The ZL40209 is an LVPECL clock fan out buffer with two input and six output clock drivers capable of operating at frequencies up to 750MHz.
The ZL40209 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40209 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.
The ZL40209 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.
Additional Features
Ultra low additive jitter of 106 fs RMS
Accepts two differential or single-ended inputs: LVPECL, LVDS, CML, HCSL, LVCMOS
Glitch-free switching of references
On-chip input termination resistors and biasing for AC coupled inputs
Six precision LVPECL outputs. Operating frequency up to 750 MHz.
Options for 2.5 V or 3.3 V power supply with core current consumption of 110 mA
On-chip Low Drop Out (LDO) Regulator for superior power supply rejection
The ZL40209 is an LVPECL clock fan out buffer with two input and six output clock drivers capable of operating at frequencies up to 750MHz.
The ZL40209 provides an internal input termination network for DC and AC coupled inputs; optional input biasing for AC coupled inputs is also provided. The ZL40209 can accept DC or AC coupled LVPECL and LVDS input signals, AC coupled CML or HCSL input signals, and single ended signals. A pin compatible device with external termination is also available.
The ZL40209 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.
Additional Features
- Ultra low additive jitter of 106 fs RMS
- Accepts two differential or single-ended inputs: LVPECL, LVDS, CML, HCSL, LVCMOS
- Glitch-free switching of references
- On-chip input termination resistors and biasing for AC coupled inputs
- Six precision LVPECL outputs. Operating frequency up to 750 MHz.
- Options for 2.5 V or 3.3 V power supply with core current consumption of 110 mA
- On-chip Low Drop Out (LDO) Regulator for superior power supply rejection
