Microchip Technology, Inc. 1:2 LVPECL Fanout Buffer ZL40200

Description
The ZL40200 is an LVPECL clock fanout buffer with two identical output clock drivers capable of operating at frequencies up to 750MHz. Inputs to the ZL40200 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40200 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. A pin compatible device with internal termination is also available. The ZL40200 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. Additional Features Ultra low additive jitter of 39 fs RMS Accepts differential or single-ended input: LVPECL, LVDS, CML, HCSL, LVCMOS Two precision LVPECL outputs Operating frequency up to 750 MHz Options for 2.5 V or 3.3 V power supply with core current consumption of 49 mA On-chip Low Drop Out (LDO) Regulator for superior power supply rejection
Datasheet
Description
The ZL40200 is an LVPECL clock fanout buffer with two identical output clock drivers capable of operating at frequencies up to 750MHz. Inputs to the ZL40200 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40200 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. A pin compatible device with internal termination is also available. The ZL40200 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. Additional Features Ultra low additive jitter of 39 fs RMS Accepts differential or single-ended input: LVPECL, LVDS, CML, HCSL, LVCMOS Two precision LVPECL outputs Operating frequency up to 750 MHz Options for 2.5 V or 3.3 V power supply with core current consumption of 49 mA On-chip Low Drop Out (LDO) Regulator for superior power supply rejection
Datasheet

Suppliers

Company
Product
Description
Supplier Links
1:2 LVPECL Fanout Buffer - ZL40200 - Microchip Technology, Inc.
Chandler, AZ, United States
1:2 LVPECL Fanout Buffer
ZL40200
1:2 LVPECL Fanout Buffer ZL40200
The ZL40200 is an LVPECL clock fanout buffer with two identical output clock drivers capable of operating at frequencies up to 750MHz. Inputs to the ZL40200 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40200 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. A pin compatible device with internal termination is also available. The ZL40200 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C. Additional Features Ultra low additive jitter of 39 fs RMS Accepts differential or single-ended input: LVPECL, LVDS, CML, HCSL, LVCMOS Two precision LVPECL outputs Operating frequency up to 750 MHz Options for 2.5 V or 3.3 V power supply with core current consumption of 49 mA On-chip Low Drop Out (LDO) Regulator for superior power supply rejection

The ZL40200 is an LVPECL clock fanout buffer with two identical output clock drivers capable of operating at frequencies up to 750MHz.

Inputs to the ZL40200 are externally terminated to allow use of precision termination components and to allow full flexibility of input termination. The ZL40200 can accept DC coupled LVPECL or LVDS and AC coupled LVPECL, LVDS, CML or HCSL input signals; single ended input signals can also be accepted. A pin compatible device with internal termination is also available.

The ZL40200 is designed to fan out low-jitter reference clocks for wired or optical communications applications while adding minimal jitter to the clock signal. An internal linear power supply regulator and bulk capacitors minimize additive jitter due to power supply noise. The device operates from 2.5V+/-5% or 3.3V+/-5% supply. Its operation is guaranteed over the industrial temperature range -40°C to +85°C.

Additional Features

  • Ultra low additive jitter of 39 fs RMS
  • Accepts differential or single-ended input: LVPECL, LVDS, CML, HCSL, LVCMOS
  • Two precision LVPECL outputs
  • Operating frequency up to 750 MHz
  • Options for 2.5 V or 3.3 V power supply with core current consumption of 49 mA
  • On-chip Low Drop Out (LDO) Regulator for superior power supply rejection
Supplier's Site Datasheet

Technical Specifications

  Microchip Technology, Inc.
Product Category Amplifier and Comparator Chips
Product Number ZL40200
Product Name 1:2 LVPECL Fanout Buffer
Package Type ['VQFN']
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