The ZL30254 is a high-performance, cost efficient, precision clock multiplier optimized for Ethernet applications that demand low-jitter clock generation. The ZL30254 accepts two input reference clocks both 8kHz or 25MHz and performs clock multiplication with jitter attenuation producing 125MHz or 156.25MHz locked output clocks.
Additional Features
Two Input Clocks
Two CMOS inputs, both 8kHz or 25MHz
Inputs continually monitored for frequency accuracy
Automatic revertive reference switching
Low-Bandwidth DPLL
25Hz bandwidth for jitter attenuation
+/- 20ppm tracking range
Digital hold on loss of all inputs
Clock Multiplier APLL and Output Clocks
Easy to configure, encapsulated design requires no external VCXO or loop filter components
Two CML outputs, both 125MHz or 156.25MHz
Outputs easily interface with CML, LVDS or LVPECL components
Output jitter <1 ps RMS (12kHz - 20MHz)
General Features
Operates from low-cost 49.125MHz fundamental-mode crystal
Status output pins indicate selected input clock, holdover, and locked/unlocked states
Input clock selection control pin
Tiny 5x5mm QFN package
The ZL30254 is a high-performance, cost efficient, precision clock multiplier optimized for Ethernet applications that demand low-jitter clock generation. The ZL30254 accepts two input reference clocks both 8kHz or 25MHz and performs clock multiplication with jitter attenuation producing 125MHz or 156.25MHz locked output clocks.
Additional Features
- Two Input Clocks
- Two CMOS inputs, both 8kHz or 25MHz
- Inputs continually monitored for frequency accuracy
- Automatic revertive reference switching
- Low-Bandwidth DPLL
- 25Hz bandwidth for jitter attenuation
- +/- 20ppm tracking range
- Digital hold on loss of all inputs
- Clock Multiplier APLL and Output Clocks
- Easy to configure, encapsulated design requires no external VCXO or loop filter components
- Two CML outputs, both 125MHz or 156.25MHz
- Outputs easily interface with CML, LVDS or LVPECL components
- Output jitter <1 ps RMS (12kHz - 20MHz)
- General Features
- Operates from low-cost 49.125MHz fundamental-mode crystal
- Status output pins indicate selected input clock, holdover, and locked/unlocked states
- Input clock selection control pin
- Tiny 5x5mm QFN package