Microchip Technology, Inc. 1-Ch Line Card Synchronizer ZL30151

Description
The ZL30151 is a high performance line card device in a tiny 5x5mm package. The device accepts up to 3 input references and generates up to 3 differential or 6 single-ended CMOS output clocks with ultra-low jitter performance of 250fs RMS. An integrated digital phase locked loop (DPLL) with programmable loop bandwidth down to 1Hz provides hitless reference switching, holdover and jitter filtering. An integrated fractional-N analog PLL (APLL) generates ultra-low jitter output clocks programmable to any frequency between <1Hz to 650MHz. The ZL30151 has all required features and functions to serve as a line card timing IC in a wide variety of equipment types. Click here for secure documentation Additional Features Applications/Uses Telecom line cards for Synchronous Ethernet, SONET/SDH, PDH, Fibre Channel Broadcast Video Frequency conversion and jitter attenuation in a wide variety of equipment types Key Features Input Clocks Three inputs, two differential/CMOS, one CMOS Any input frequency from 1kHz to 650MHz (1kHz to 300MHz for CMOS) Inputs continually monitored for activity and frequency accuracy Automatic or manual reference switching Low-Bandwidth DPLL All of the features needed for SyncE line card timing Programmable bandwidth, 1Hz to 500Hz Attenuates jitter up to several UI Freerun or holdover on loss of all inputs Hitless Reference Switching High-resolution holdover averaging Digitally controlled phase adjustment Low-Jitter Fractional-N APLL and 3 Output Clocks Any output frequency from <1Hz to 650MHz High resolution fractional frequency conversion with 0ppm error Easy-to-configure, encapsulated design requires no external VCXO or loop filter components Each output has independent dividers Output jitter is typically 0.16 to 0.28ps RMS (12kHz - 20MHz integration band) Each output is CML or 2 x CMOS, can interface to LVDS, LVPECL, HSTL, SSTL and HCSL In 2 x CMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz) Per-output supply pin with CMOS output voltages from 1.5V to 3.3V Precise output alignment circuitry and per-output phase adjustment Per-output enable/disable and glitchless start/stop (stop high or low) General Features Automatic self-configuration at power-up from internal EEPROM: up to four configurations that are pin selectable Numerically controlled oscillator mode Zero-delay mode with external feedback SPI or I2C processor interface Easy-to-use evaluation software 32 pin 5 x 5mm QFN package
Datasheet
Description
The ZL30151 is a high performance line card device in a tiny 5x5mm package. The device accepts up to 3 input references and generates up to 3 differential or 6 single-ended CMOS output clocks with ultra-low jitter performance of 250fs RMS. An integrated digital phase locked loop (DPLL) with programmable loop bandwidth down to 1Hz provides hitless reference switching, holdover and jitter filtering. An integrated fractional-N analog PLL (APLL) generates ultra-low jitter output clocks programmable to any frequency between <1Hz to 650MHz. The ZL30151 has all required features and functions to serve as a line card timing IC in a wide variety of equipment types. Click here for secure documentation Additional Features Applications/Uses Telecom line cards for Synchronous Ethernet, SONET/SDH, PDH, Fibre Channel Broadcast Video Frequency conversion and jitter attenuation in a wide variety of equipment types Key Features Input Clocks Three inputs, two differential/CMOS, one CMOS Any input frequency from 1kHz to 650MHz (1kHz to 300MHz for CMOS) Inputs continually monitored for activity and frequency accuracy Automatic or manual reference switching Low-Bandwidth DPLL All of the features needed for SyncE line card timing Programmable bandwidth, 1Hz to 500Hz Attenuates jitter up to several UI Freerun or holdover on loss of all inputs Hitless Reference Switching High-resolution holdover averaging Digitally controlled phase adjustment Low-Jitter Fractional-N APLL and 3 Output Clocks Any output frequency from <1Hz to 650MHz High resolution fractional frequency conversion with 0ppm error Easy-to-configure, encapsulated design requires no external VCXO or loop filter components Each output has independent dividers Output jitter is typically 0.16 to 0.28ps RMS (12kHz - 20MHz integration band) Each output is CML or 2 x CMOS, can interface to LVDS, LVPECL, HSTL, SSTL and HCSL In 2 x CMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz) Per-output supply pin with CMOS output voltages from 1.5V to 3.3V Precise output alignment circuitry and per-output phase adjustment Per-output enable/disable and glitchless start/stop (stop high or low) General Features Automatic self-configuration at power-up from internal EEPROM: up to four configurations that are pin selectable Numerically controlled oscillator mode Zero-delay mode with external feedback SPI or I2C processor interface Easy-to-use evaluation software 32 pin 5 x 5mm QFN package
Datasheet

Suppliers

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Product
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Supplier Links
1-Ch Line Card Synchronizer - ZL30151 - Microchip Technology, Inc.
Chandler, AZ, United States
1-Ch Line Card Synchronizer
ZL30151
1-Ch Line Card Synchronizer ZL30151
The ZL30151 is a high performance line card device in a tiny 5x5mm package. The device accepts up to 3 input references and generates up to 3 differential or 6 single-ended CMOS output clocks with ultra-low jitter performance of 250fs RMS. An integrated digital phase locked loop (DPLL) with programmable loop bandwidth down to 1Hz provides hitless reference switching, holdover and jitter filtering. An integrated fractional-N analog PLL (APLL) generates ultra-low jitter output clocks programmable to any frequency between <1Hz to 650MHz. The ZL30151 has all required features and functions to serve as a line card timing IC in a wide variety of equipment types. Click here for secure documentation Additional Features Applications/Uses Telecom line cards for Synchronous Ethernet, SONET/SDH, PDH, Fibre Channel Broadcast Video Frequency conversion and jitter attenuation in a wide variety of equipment types Key Features Input Clocks Three inputs, two differential/CMOS, one CMOS Any input frequency from 1kHz to 650MHz (1kHz to 300MHz for CMOS) Inputs continually monitored for activity and frequency accuracy Automatic or manual reference switching Low-Bandwidth DPLL All of the features needed for SyncE line card timing Programmable bandwidth, 1Hz to 500Hz Attenuates jitter up to several UI Freerun or holdover on loss of all inputs Hitless Reference Switching High-resolution holdover averaging Digitally controlled phase adjustment Low-Jitter Fractional-N APLL and 3 Output Clocks Any output frequency from <1Hz to 650MHz High resolution fractional frequency conversion with 0ppm error Easy-to-configure, encapsulated design requires no external VCXO or loop filter components Each output has independent dividers Output jitter is typically 0.16 to 0.28ps RMS (12kHz - 20MHz integration band) Each output is CML or 2 x CMOS, can interface to LVDS, LVPECL, HSTL, SSTL and HCSL In 2 x CMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz) Per-output supply pin with CMOS output voltages from 1.5V to 3.3V Precise output alignment circuitry and per-output phase adjustment Per-output enable/disable and glitchless start/stop (stop high or low) General Features Automatic self-configuration at power-up from internal EEPROM: up to four configurations that are pin selectable Numerically controlled oscillator mode Zero-delay mode with external feedback SPI or I2C processor interface Easy-to-use evaluation software 32 pin 5 x 5mm QFN package

The ZL30151 is a high performance line card device in a tiny 5x5mm package. The device accepts up to 3 input references and generates up to 3 differential or 6 single-ended CMOS output clocks with ultra-low jitter performance of 250fs RMS. An integrated digital phase locked loop (DPLL) with programmable loop bandwidth down to 1Hz provides hitless reference switching, holdover and jitter filtering. An integrated fractional-N analog PLL (APLL) generates ultra-low jitter output clocks programmable to any frequency between <1Hz to 650MHz.
The ZL30151 has all required features and functions to serve as a line card timing IC in a wide variety of equipment types.

Click here for secure documentation Additional Features

  • Applications/Uses
    • Telecom line cards for Synchronous Ethernet, SONET/SDH, PDH, Fibre Channel
    • Broadcast Video
    • Frequency conversion and jitter attenuation in a wide variety of equipment types
  • Key Features
  • Input Clocks
    • Three inputs, two differential/CMOS, one CMOS
    • Any input frequency from 1kHz to 650MHz (1kHz to 300MHz for CMOS)
    • Inputs continually monitored for activity and frequency accuracy
    • Automatic or manual reference switching
  • Low-Bandwidth DPLL
    • All of the features needed for SyncE line card timing
    • Programmable bandwidth, 1Hz to 500Hz
    • Attenuates jitter up to several UI
    • Freerun or holdover on loss of all inputs
    • Hitless Reference Switching
    • High-resolution holdover averaging
    • Digitally controlled phase adjustment
  • Low-Jitter Fractional-N APLL and 3 Output Clocks
    • Any output frequency from <1Hz to 650MHz
    • High resolution fractional frequency conversion with 0ppm error
    • Easy-to-configure, encapsulated design requires no external VCXO or loop filter components
    • Each output has independent dividers
    • Output jitter is typically 0.16 to 0.28ps RMS (12kHz - 20MHz integration band)
    • Each output is CML or 2 x CMOS, can interface to LVDS, LVPECL, HSTL, SSTL and HCSL
    • In 2 x CMOS mode, the P and N pins can be different frequencies (e.g. 125MHz and 25MHz)
    • Per-output supply pin with CMOS output voltages from 1.5V to 3.3V
    • Precise output alignment circuitry and per-output phase adjustment
    • Per-output enable/disable and glitchless start/stop (stop high or low)
  • General Features
    • Automatic self-configuration at power-up from internal EEPROM: up to four configurations that are pin selectable
    • Numerically controlled oscillator mode
    • Zero-delay mode with external feedback
    • SPI or I2C processor interface
    • Easy-to-use evaluation software
    • 32 pin 5 x 5mm QFN package
Supplier's Site Datasheet

Technical Specifications

  Microchip Technology, Inc.
Product Category Network Clock Sources
Product Number ZL30151
Product Name 1-Ch Line Card Synchronizer
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